Reference schematic

CAT_Interface

BarceP-CAT_Interface-CAT_Interface-schematic

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BarceP-CAT_Interface-CAT_Interface-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
20Placed parts
13Net labels
KiCad 9File format

Bill of materials

20 distinct parts

20 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
D45.1VDevice:D_Zener
R11330Device:R
R131kDevice:R
R141kDevice:R
R160Device:R
R181kDevice:R
R191kDevice:R
R200Device:R
R211kDevice:R
R221kDevice:R
R231kDevice:R
R241kDevice:R
R251kDevice:R
R261kDevice:R
U10EL357N(C)(TA)-GIsolator:TLP185
U11EL357N(C)(TA)-GIsolator:TLP185
U12EL357N(C)(TA)-GIsolator:TLP185
U7EL357N(C)(TA)-GIsolator:TLP185
U8EL357N(C)(TA)-GIsolator:TLP185
U9EL357N(C)(TA)-GIsolator:TLP185

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.