Reference schematic

Interface Board

BetzDrive-interface-board-3-interface-board-schematic

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BetzDrive-interface-board-3-interface-board-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
56Placed parts
17Net labels
KiCad 6 pre-releaseFile format

Bill of materials

56 distinct parts

52 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
C1100nDevice:C_Small
C1027pDevice:C_Small
C114.7uDevice:C_Small
C12100nDevice:C_Small
C13100nDevice:C_Small
C14100nDevice:C_Small
C154.7uDevice:C_Small
C16100nDevice:C_Small
C17100nDevice:C_Small
C18100nDevice:C_Small
C1910nDevice:C_Small
C24.7uDevice:C_Small
C20100nDevice:C_Small
C2110uDevice:C_Small
C22100nDevice:C_Small
C2310nDevice:C_Small
C24100nDevice:C_Small
C2510uDevice:C_Small
C2610nDevice:C_Small
C34.7uDevice:C_Small
C4100nDevice:C_Small
C4922uDevice:C_Small
C510nDevice:C_Small
C504n7Device:C_Small
C5147uDevice:C_Small
C6100nDevice:C_Small
C7100nDevice:C_Small
C8100nDevice:C_Small
C927pDevice:C_Small
D1GREENDevice:LED
D2REDDevice:LED
FB1600RDevice:Ferrite_Bead_Small
FB2600RDevice:Ferrite_Bead_Small
FB3600RDevice:Ferrite_Bead_Small
J1arm connectorConnector_Generic:Conn_01x05
J2USB_B_MicroConnector:USB_B_Micro
J6logic-side RS485 debug/expansionConnector_Generic:Conn_01x04
J8power-side RS485 debug/expansionConnector_Generic:Conn_01x03
R110KDevice:R_Small
R210KDevice:R_Small
Show the other 16
R20437kDevice:R_Small
R22140kDevice:R_Small
R23120Device:R_Small
R32.2kDevice:R_Small
R410KDevice:R_Small
R510KDevice:R_Small
R612KDevice:R_Small
R7470RDevice:R_Small
R8470RDevice:R_Small
U193LCxxBMemory_EEPROM:93LCxxB
U11LMZ21700SILBLDC:LMZ21700SILT
U2FT232HInterface_USB:FT232H
U3ADM2682EInterface_UART:ADM2682E
U4TPD2E2U06DCKPower_Protection:SP0502BAJT
U5TPD2E2U06DCKPower_Protection:SP0502BAJT
Y112MHzDevice:Crystal

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.