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Reference schematic

DDR4

DergLabs-DICE-4-DICE-schematic

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DergLabs-DICE-4-DICE-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
40Placed parts
59Net labels
KiCad 8File format

Bill of materials

39 distinct parts

38 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
C444.7uFDevice:C_Small
C454.7uFDevice:C_Small
C464.7uFDevice:C_Small
C4710nFDevice:C_Small
C484.7uFDevice:C_Small
C49100nFDevice:C_Small
C50100nFDevice:C_Small
C51100nFDevice:C_Small
C52100nFDevice:C_Small
C53470nFDevice:C_Small
C54470nFDevice:C_Small
C554.7uFDevice:C_Small
C5610nFDevice:C_Small
C57100nFDevice:C_Small
C58100nFDevice:C_Small
C59100nFDevice:C_Small
C60100nFDevice:C_Small
C61470nFDevice:C_Small
C62470nFDevice:C_Small
C634.7uFDevice:C_Small
D52V5 ONDevice:LED
R36100KDevice:R_US
R3710KDevice:R_US
R383.3kDevice:R_US
R395.1KDevice:R_US
R404.7KDevice:R_US
R4133RDevice:R_US
R42240RDevice:R_US
R4333RDevice:R_US
R44100RDevice:R_US
R454.7KDevice:R_US
R46100RDevice:R_US
R47499RDevice:R_US
R484.7KDevice:R_US
R49499RDevice:R_US
TP19Test PointConnector:TestPoint
TP20Test PointConnector:TestPoint
U4TPS74801AWDRCRegulator_Linear:TPS74801AWDRC
U5MT40A512M16LY-075:EFPGA Module:MT40A512M16LY-075{colon}E

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.