Reference layout

Simple Fet

Duckle29-simple_fet-simple_fet-layout

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Duckle29-simple_fet-simple_fet-layout

The project archive carries the board, its project file and the upstream licence. The archive is zstd-compressed (tar.zst).

243Placed parts
5Nets
2Copper layers
82.5 × 103.5 mmBoard size
yesRouted
KiCad 5File format

Bill of materials

9 distinct parts

6 resolve to something in the catalog — click through to the footprint.

RefValueFootprintQty
D1?Diode_SMD:D_SMA-SMB_Universal_Handsoldering
G***LOGOgraphics:kiwi10mm
J1SolenoidConnector_JST:JST_PH_S2B-PH-K_1x02_P2.00mm_Horizontal
J2Conn_01x03Connector_JST:JST_PH_S3B-PH-K_1x03_P2.00mm_Horizontal
J3SolenoidConnector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical
J4Conn_01x03Connector_PinHeader_2.54mm:PinHeader_1x03_P2.54mm_Vertical
Q1Q_NMOS_GSDPackage_TO_SOT_SMD:SOT-23_Handsoldering
R11kResistor_SMD:R_0603_1608Metric_Pad1.05x0.95mm_HandSolder
R210kResistor_SMD:R_0603_1608Metric_Pad1.05x0.95mm_HandSolder

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.