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Reference schematic

Gators Floppy Overdrive

Emu-gators-floppy-overdrive-floppy-overdrive-schematic

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Emu-gators-floppy-overdrive-floppy-overdrive-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
78Placed parts
66Net labels
KiCad 6File format

Bill of materials

78 distinct parts

71 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
C10.1uDevice:C_Small
C20.1uDevice:C_Small
C333uDevice:C_Polarized_Small
C433uDevice:C_Polarized_Small
C50.1uDevice:C_Small
C60.1uDevice:C_Small
C70.1uDevice:C_Small
C847uDevice:C_Small
C947uDevice:C_Small
D1LED1Device:LED
D2LED2Device:LED
D3LED3Device:LED
D4LED4Device:LED
FB1FerriteBeadDevice:FerriteBead
FB2FerriteBeadDevice:FerriteBead
IC1THS4521IDRTHS4521IDR:THS4521IDR
IC2THS4521IDRTHS4521IDR:THS4521IDR
IC3MAX660MX_NOPBMAX660MX_NOPB:MAX660MX_NOPB
J1174804-1174804-1:174804-1
J10Flop_ADC_HeaderConnector_Generic:Conn_01x02
J2Motor_HeaderConnector_Generic:Conn_01x04
J3Floppy_BusConnector_Generic:Conn_02x17_Odd_Even
J4Sensor_HeaderConnector_Generic:Conn_02x05_Row_Letter_First
J5Heads_HeaderConnector_Generic:Conn_02x05_Row_Letter_First
J6Step_HeaderConnector_Generic:Conn_02x05_Row_Letter_First
J7PIC_ADC_HeaderConnector_Generic:Conn_02x02_Odd_Even
J8FPGA_IO_HeaderConnector_Generic:Conn_02x20_Odd_Even
J9HeadOut_HeaderConnector_Generic:Conn_02x04_Row_Letter_First
JP1LED_EnableJumper:Jumper_2_Bridged
JP2HeadPos_SelJumper:Jumper_3_Open
JP3HeadNeg_SelJumper:Jumper_3_Open
R1220Device:R_Small_US
R1047kDevice:R_Small_US
R111kDevice:R_US
R12510Device:R_US
R13510Device:R_US
R14510Device:R_US
R15510Device:R_US
R1610kDevice:R_US
R1710kDevice:R_US
Show the other 38
R181kDevice:R_US
R191kDevice:R_Small_US
R2220Device:R_Small_US
R2010kDevice:R_US
R2110kDevice:R_US
R221kDevice:R_Small_US
R231kDevice:R_US
R2410kDevice:R_US
R2510kDevice:R_US
R3220Device:R_Small_US
R447kDevice:R_Small_US
R510kDevice:R_Small_US
R61kDevice:R_Small_US
R71kDevice:R_Small_US
R822kDevice:R_Small_US
R9220Device:R_Small_US
SW1RST_BtnSwitch:SW_Push
TP1TP_5VConnector:TestPoint
TP10TP_WP5VConnector:TestPoint
TP11TP_Track05VConnector:TestPoint
TP12TP_Coil1Connector:TestPoint
TP13TP_Coil3Connector:TestPoint
TP14TP_Coil2Connector:TestPoint
TP15TP_Coil4Connector:TestPoint
TP16TP_-2V5Connector:TestPoint
TP17TP_2V5Connector:TestPoint
TP2TP_12VConnector:TestPoint
TP3TP_3V3Connector:TestPoint
TP4TP_WPConnector:TestPoint
TP5TP_IndexConnector:TestPoint
TP6TP_DiskConnector:TestPoint
TP7TP_Track0Connector:TestPoint
TP8TP_Index5VConnector:TestPoint
TP9TP_Read5VConnector:TestPoint
U1TXB0108-PWTXB0108-PW:TXB0108-PW
U2TXB0108-PWTXB0108-PW:TXB0108-PW
U3ULN2003Transistor_Array:ULN2003
U4IceWerx FPGAIceWerx:IceWerx FPGA

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.