Reference schematic

Soslab Alpha Hardware Release

GSO-soslab-alpha_hardware_release-3-alpha_hardware_release-schematic

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GSO-soslab-alpha_hardware_release-3-alpha_hardware_release-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
40Placed parts
13Net labels
KiCad 8File format

Bill of materials

40 distinct parts

25 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
C10.1uFDevice:C
C21nFDevice:C
C31nFDevice:C
H1MountingHoleMechanical:MountingHole
H2MountingHoleMechanical:MountingHole
H3MountingHoleMechanical:MountingHole
H4MountingHoleMechanical:MountingHole
J1VB_INConnector:Screw_Terminal_01x02
J10Payload_JST_2Connector:Conn_01x02_Male
J11Payload_JST_3Connector:Conn_01x02_Male
J12Payload_JST_5Connector:Conn_01x02_Male
J13FIN_PWRConnector:Conn_01x02_Male
J14PI_MVP_PWRConnector:Conn_01x02_Male
J15PI_Payload_PWRConnector:Conn_01x02_Male
J165V_R1Connector:Conn_01x02_Male
J17Conn_01x04_PinConnector:Conn_01x04_Pin
J19Screw_Terminal_01x06Connector:Screw_Terminal_01x06
J2VB_INConnector:Screw_Terminal_01x02
J205V_R2Connector:Conn_01x02_Male
J21VBConnector:Screw_Terminal_01x02
J22PI_MVP_PWRConnector:Conn_01x02_Male
J23Screw_Terminal_01x06Connector:Screw_Terminal_01x06
J3Thruster_PWR2Connector:Screw_Terminal_01x02
J4Thruster_PWR3Connector:Screw_Terminal_01x02
J5Thruster_PWR1Connector:Screw_Terminal_01x02
J6Payload_JST_1Connector:Conn_01x02_Male
J7Conn_01x04_PinConnector:Conn_01x04_Pin
J8Payload_JST_1Connector:Conn_01x02_Male
J9Payload_JST_4Connector:Conn_01x02_Male
Q1FDS8884Transistor_FET:FDS2734
Q2FDS8884Transistor_FET:FDS2734
Q3FDS8884Transistor_FET:FDS2734
R110kDevice:R
R210kDevice:R
R310kDevice:R
R42kDevice:R
U1D30V30F15Pololu:D36V28F5
U2D30V30F5Pololu:D36V28F5
U3D30V30F5Pololu:D36V28F5
U4ACS724xLCTR-30AUSensor_Current:ACS724xLCTR-30AU

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.