Reference layout
TandyCircuitsAndLogic
JayesonLS-TandyCircuitsAndLogic-TandyCircuitsAndLogic-layout
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JayesonLS-TandyCircuitsAndLogic-TandyCircuitsAndLogic-layout
The project archive carries the board, its project file and the upstream licence. The archive is zstd-compressed (tar.zst).
865Placed parts
39Nets
2Copper layers
100 × 96 mmBoard size
yesRouted
KiCad 5File format
Bill of materials
7 distinct parts
None of these names match a library the catalog carries.
| Ref | Value | Footprint | Qty |
|---|---|---|---|
| C1 | 100uF | Capacitors_ThroughHole:C_Radial_D7.5_L11.2_P2.5 | |
| P1 | CocoEdgeConnector | 0Titanium:CocoCardEdgeCocoMIDI | |
| P10 | Power Bus | Housings_DIP:DIP-16_W7.62mm | |
| P2 | Coco Data | Housings_DIP:DIP-16_W7.62mm | |
| P3 | Coco Address | Housings_DIP:DIP-32_W15.24mm | |
| P4 | Coco Signals | Housings_DIP:DIP-22_W10.16mm | |
| REF** | 1pin | Connect:1pin |
Provenance
- Repository
- JayesonLS/TandyCircuitsAndLogic ↗
- Commit
- unknown
- Licence
- CC-BY-4.0
How it is used
Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.