Reference layout

Circuit BOARD10

KabitaShahu-Circuit-board10-Circuit-layout

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KabitaShahu-Circuit-board10-Circuit-layout

The project archive carries the board, its project file and the upstream licence. The archive is zstd-compressed (tar.zst).

55Placed parts
51Nets
2Copper layers
133 × 64.1 mmBoard size
yesRouted
KiCad 8File format

Bill of materials

46 distinct parts

8 resolve to something in the catalog — click through to the footprint.

RefValueFootprintQty
C1CMY_LIB:Capacitor_Disc_Small
C10CMY_LIB:Capacitor_Disc_Small
C2CMY_LIB:Capacitor_Disc_Small
C3CMY_LIB:Capacitor_Disc_Small
C4CMY_LIB:Capacitor_100uF
C5CMY_LIB:Capacitor_Disc_Small
C6CMY_LIB:Capacitor_10uF
C8CMY_LIB:Capacitor_100uF
C9CMY_LIB:Capacitor_Disc_Small
D11N914MY_LIB:Diode_Medium
D21N914MY_LIB:Diode_Medium
D3LEDMY_LIB:bornier2
D4LEDMY_LIB:bornier2
D5LEDMY_LIB:bornier2
H1MountingHoleMountingHole:MountingHole_3mm
H2MountingHoleMountingHole:MountingHole_3mm
J1Conn_01x02_PinMY_LIB:bornier2
J10Conn_01x05_PinMY_LIB:new_5_jst_bournier
J11Conn_01x06_PinBMS:BMS
J15Conn_01x05_PinMY_LIB:new_5_jst_bournier
J2Conn_01x02_PinMY_LIB:bornier2
J5Conn_01x04_PinMY_LIB:new_5_jst_bournier
J6Conn_01x02_PinMY_LIB:bornier2
J7Conn_02x14_Counter_ClockwiseMY_LIB:DIP-28
J8Conn_02x09_Counter_ClockwisePackage_DIP:DIP-18_W7.62mm_LongPads
J9Conn_01x06_PinConnector_PinHeader_2.54mm:PinHeader_1x06_P2.54mm_Vertical
Q1NMOSPackage_TO_SOT_THT:TO-220-3_Vertical
Q2NMOSPackage_TO_SOT_THT:TO-220-3_Vertical
R1RMY_LIB:Resistor_small
R10RMY_LIB:Resistor_small
R11RMY_LIB:Resistor_small
R12RMY_LIB:Resistor_small
R2RMY_LIB:Resistor_small
R3RMY_LIB:Resistor_small
R4RMY_LIB:Resistor_small
R5RMY_LIB:Resistor_small
R6RMY_LIB:Resistor_small
R7RResistor_THT:R_Axial_DIN0516_L15.5mm_D5.0mm_P20.32mm_Horizontal
R8RMY_LIB:Resistor_small
Show the other 6
R9RMY_LIB:Resistor_small
RV1R_PotentiometerMY_LIB:bornier2
SW1SW_SPSTMY_LIB:Push_Button
U1~Package_DIP:DIP-14_W7.62mm
U2L7805MY_LIB:Voltage_Regulators
Y1CrystalMY_LIB:Crystal

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.