Reference schematic

NightStandClock

LucasCanete-BasicClock-BasicClock-schematic

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LucasCanete-BasicClock-BasicClock-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
64Placed parts
15Net labels
KiCad 8File format

Bill of materials

64 distinct parts

64 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
BT1Battery_CellDevice:Battery_Cell
C1100nFDevice:C
C101uFDevice:C
C111uFDevice:C
C120.1uFDevice:C
C131uFDevice:C
C14100nFDevice:C
C15100nFDevice:C
C161uFDevice:C
C1710uFDevice:C_Polarized
C181uFDevice:C
C191uFDevice:C
C2100nFDevice:C
C201uFDevice:C
C211uFDevice:C
C221uFDevice:C
C231uFDevice:C
C241uFDevice:C
C251uFDevice:C
C3100nFDevice:C
C4100nFDevice:C
C5100nFDevice:C
C6100nFDevice:C
C7100nFDevice:C
C8100nFDevice:C
C9100nFDevice:C
D1RDevice:LED
D4LEDDevice:LED
D51N4148Diode:1N4148
D6LEDDevice:LED
H1MountingHoleMechanical:MountingHole
H2MountingHoleMechanical:MountingHole
J1Conn_01x02_PinConnector:Conn_01x02_Pin
J2Conn_02x03_Odd_EvenConnector_Generic:Conn_02x03_Odd_Even
J3Conn_01x04_PinConnector:Conn_01x04_Pin
P1USB_C_Plug_USB2.0Connector:USB_C_Plug_USB2.0
R110KDevice:R
R1010KDevice:R
R11220Device:R
R14220Device:R
Show the other 24
R15200Device:R
R164.7KDevice:R
R174.7KDevice:R
R184.7KDevice:R
R194.7KDevice:R
R210KDevice:R
R200Device:R
R211KDevice:R
R225.1KDevice:R
R310KDevice:R
R410KDevice:R
R510KDevice:R
R610KDevice:R
R910KDevice:R
SW1~Switch:SW_Push
SW2~Switch:SW_Push
SW3~Switch:SW_Push
SW4SW_PushSwitch:SW_Push
U1ATmega328PB-AMCU_Microchip_ATmega:ATmega328PB-A
U2BME280Sensor:BME280
U3DS3231MZTimer_RTC:DS3231MZ
U4XC6206PxxxMRRegulator_Linear:XC6206PxxxMR
U5FT232RLInterface_USB:FT232RL
U6EA_DOGL128X-6Display_Graphic:EA_DOGL128X-6

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.