Reference schematic

EPC Aegis 2025

MUNAKATA-EPC-Aegis_2025-5-Aegis_2025-schematic

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MUNAKATA-EPC-Aegis_2025-5-Aegis_2025-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
22Placed parts
2Net labels
KiCad 7File format

Bill of materials

11 distinct parts

11 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
D2NeoPixel_THTLED:NeoPixel_THT
D3NeoPixel_THTLED:NeoPixel_THT
D4NeoPixel_THTLED:NeoPixel_THT
J1Conn_01x04_PinConnector:Conn_01x04_Pin
J2Conn_01x01_PinConnector:Conn_01x01_Pin
Q1Q_Photo_NPNDevice:Q_Photo_NPN
Q2Q_Photo_NPNDevice:Q_Photo_NPN
Q3Q_Photo_NPNDevice:Q_Photo_NPN
Q4Q_Photo_NPNDevice:Q_Photo_NPN
R11KDevice:R
RV1R_Potentiometer_Trim_USDevice:R_Potentiometer_Trim_US

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.