Reference schematic

EPC Artemis 2024

MUNAKATA-EPC-Artemis_2024-5-Artemis_2024-schematic

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MUNAKATA-EPC-Artemis_2024-5-Artemis_2024-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
20Placed parts
3Net labels
KiCad 6File format

Bill of materials

20 distinct parts

10 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
D1DDevice:D
D2DDevice:D
J1Conn_01x02_FemaleConnector:Conn_01x02_Female
J2Conn_01x02_FemaleConnector:Conn_01x02_Female
J3Conn_01x02_FemaleConnector:Conn_01x02_Female
J4Conn_01x04_FemaleConnector:Conn_01x04_Female
J5Conn_01x02_FemaleConnector:Conn_01x02_Female
J6Conn_01x02_FemaleConnector:Conn_01x02_Female
J7Conn_01x03_FemaleConnector:Conn_01x03_Female
Q1Q_PMOS_GDSDevice:Q_PMOS_GDS
Q2Q_NMOS_GDSDevice:Q_NMOS_GDS
R1RDevice:R
R2RDevice:R
R3RDevice:R
R4RDevice:R
R6RDevice:R
R7RDevice:R
U1ILD74Isolator:ILD74
U2ILD74Isolator:ILD74
U3XL6009XL6009:XL6009

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.