Reference schematic

Kapetanios Senior Design

Petros-Kapetanios-Senior-Design-Senior-Design-schematic

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Petros-Kapetanios-Senior-Design-Senior-Design-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
58Placed parts
3Net labels
KiCad 8File format

Bill of materials

56 distinct parts

52 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
C1100 uFDevice:C
C1022 nFDevice:C
C1120 nFDevice:C
C1210 nFDevice:C
C1310 nFDevice:C
C141.5 uFDevice:C
C151.5 uFDevice:C
C21 uFDevice:C
C31 uFDevice:C
C41 uFDevice:C
C51 uFDevice:C
C81.5 uFDevice:C
C91.5 uFDevice:C
D1W04GDiode_Bridge:W04G
D2D_ZenerDevice:D_Zener
D3D_ZenerDevice:D_Zener
F1FuseDevice:Fuse
J1HoleConnector:Conn_01x01_Pin
J10WireConnector:Conn_01x01_Pin
J11WireConnector:Conn_01x01_Pin
J12WireConnector:Conn_01x01_Pin
J13WireConnector:Conn_01x01_Pin
J14WireConnector:Conn_01x01_Pin
J15WireConnector:Conn_01x01_Pin
J16WireConnector:Conn_01x01_Pin
J2HoleConnector:Conn_01x01_Pin
J3HoleConnector:Conn_01x01_Pin
J4HoleConnector:Conn_01x01_Pin
J5WireConnector:Conn_01x01_Pin
J6WireConnector:Conn_01x01_Pin
J7WireConnector:Conn_01x01_Pin
J8WireConnector:Conn_01x01_Pin
P1Conn_WallPlug_EarthConnector:Conn_WallPlug_Earth
P2Conn_WallPlug_EarthConnector:Conn_WallPlug_Earth
R13 KDevice:R
R1010 KDevice:R
R1110 KDevice:R
R1210 KDevice:R
R1310 KDevice:R
R1410 KDevice:R
Show the other 16
R1530Device:R
R251.1kDevice:R
R351.1 KDevice:R
R420 KDevice:R
R520 KDevice:R
R610 KDevice:R
R710 KDevice:R
R81 KDevice:R
R910 KDevice:R
RV1R_PotentiometerDevice:R_Potentiometer
RV2R_PotentiometerDevice:R_Potentiometer
T1FS20-055-C2FS20-055-C2:FS20-055-C2
T2CSE185LCSE185L:CSE185L
U112 V RegulatorRegulator_Linear:LF15_TO220
U25 V RegulatorRegulator_Linear:LF15_TO220
U4LM358Amplifier_Operational:LM358

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.