Reference schematic

USC Electrical Systems

SCFormulaElectric-USC-Electrical-Systems-8-USC-Electrical-Systems-schematic

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SCFormulaElectric-USC-Electrical-Systems-8-USC-Electrical-Systems-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
45Placed parts
42Net labels
KiCad 9File format

Bill of materials

45 distinct parts

37 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
D1PVL10FLS11Device:LED
F2A50QS75-4YDevice:Fuse
F30505025.MXPDevice:Fuse
F4FuseDevice:Fuse
F50505020.MXPDevice:Fuse
F6FuseDevice:Fuse
F7FuseDevice:Fuse
J1DTM04-12PA-L012Connector:Conn_01x12_Socket
J10Nema 5-20Connector:Conn_01x03_Socket
J11UPCR012ALS1Connector:Conn_01x04_Socket
J12UPCP012ALS1Connector:Conn_01x04_Pin
J13DTM04-12PA-L012Connector:Conn_01x12_Socket
J14DTM06-12SAConnector:Conn_01x12_Pin
J2DTM06-12SAConnector:Conn_01x12_Pin
J20??? can't find PNConnector:Conn_01x04_Socket
J3DTM06-12SAConnector:Conn_01x12_Pin
J4DTM04-12PA-L012Connector:Conn_01x12_Socket
J5UPCP012ALS2Connector:Conn_01x04_Pin
J6UPCR012ALS1Connector:Conn_01x04_Socket
J7DTM04-12PA-L012Connector:Conn_01x12_Socket
J8DTM06-12SAConnector:Conn_01x12_Pin
J9J1772Connector:Conn_01x05_Socket
K1GV24 1BAXRelay:DIPxx-1Axx-11x
K2Relay_DPST-NORelay:Relay_DPST-NO
K3P115 BDARelay:DIPxx-1Axx-11x
K4GV24 1BAXRelay:DIPxx-1Axx-11x
PS1Amazon rectifierConverter_ACDC:VTX-214-010-112
R1R_USDevice:R_US
R2R_USDevice:R_US
R4RCH50S15001JS06Device:R_US
R530kDevice:R
R622kDevice:R
SW184-5330.0020Switch:SW_SPST
SW2resetSwitch:SW_Push
TP1TestPointConnector:TestPoint
TP2TestPointConnector:TestPoint
U12IMDFSAE:IMD
U16Battery PackFSAE:Battery
U18BMSFSAE:BMS
U19DS18B20-PARSensor_Temperature:DS18B20-PAR
Show the other 5
U2Relay boardRandom:Relay_board
U20RSBRandom:RSB
U46.6kW Elcon ChargerFSAE:Elcon
U5Volt_indicRandom:Volt_indic
U6prechargeRandom:Precharge

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.