Reference schematic

CelestiCall

SunnyYoshimitsu-CelestiCall-18-CelestiCall-schematic

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SunnyYoshimitsu-CelestiCall-18-CelestiCall-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
24Placed parts
15Net labels
KiCad 8File format

Bill of materials

24 distinct parts

22 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
C122uFDevice:C
C26470nFDevice:C
C27470nFDevice:C
D2SML-P11UTT86Device:LED
FB3MPZ0603S121HT000Device:FerriteBead
R1420kDevice:R
R1520kDevice:R
R1620kDevice:R
R1720kDevice:R
R1810kDevice:R
R1910kDevice:R
R2020kDevice:R
R2133Device:R
R22470Device:R
R2310kDevice:R
R2410kDevice:R
R2510kDevice:R
R2610kDevice:R
R2710kDevice:R
R2810kDevice:R
U3XC7Z010-1CLG225IPersonal:XC7Z010-1CLG225I
U5W25Q128JVSMemory_Flash:W25Q128JVS
U60473092651Personal:U
X1SIT8008BI-73-XXS-33.333333Oscillator:SG-210SCD

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.