Reference layout

Power Analyzer with an ACS71020 and a Teensy 4.0

Vrail99-PowerAnalyzer-board2-PowerAnalyzer-layout

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Vrail99-PowerAnalyzer-board2-PowerAnalyzer-layout

The project archive carries the board, its project file and the upstream licence. The archive is zstd-compressed (tar.zst).

41Placed parts
54Nets
2Copper layers
58.45 × 67.85 mmBoard size
yesRouted
KiCad 6File format

Bill of materials

38 distinct parts

14 resolve to something in the catalog — click through to the footprint.

RefValueFootprintQty
MountingHole_2.5mmMountingHole:MountingHole_2.5mm
5V(AC)TestPoint_Pad_D1.5mmTestPoint:TestPoint_Pad_D1.5mm
C10.1uCapacitor_SMD:C_0805_2012Metric_Pad1.15x1.40mm_HandSolder
C101uCapacitor_SMD:C_0805_2012Metric_Pad1.15x1.40mm_HandSolder
C20.1uCapacitor_SMD:C_0805_2012Metric_Pad1.15x1.40mm_HandSolder
C310uCapacitor_SMD:C_0805_2012Metric_Pad1.15x1.40mm_HandSolder
C410uCapacitor_SMD:C_0805_2012Metric_Pad1.15x1.40mm_HandSolder
C54.7uCapacitor_THT:CP_Radial_D10.0mm_P5.00mm
C6100uCapacitor_SMD:2312_SMD_CAP
C768uCapacitor_SMD:2312_SMD_CAP
C91uCapacitor_SMD:C_0805_2012Metric_Pad1.15x1.40mm_HandSolder
D1Vf <= 0.3VDiode_SMD:D_SOD-323_HandSoldering
D2Vf <= 0.3VDiode_SMD:D_SOD-323_HandSoldering
F1Fuseown_footprints:Fuseholder 5x20mm
GND
J1L_VinN_outown_footprints:Flachstecker_8mm_B6.3mm_P4mm
J2L_VinL_outown_footprints:Flachstecker_8mm_B6.3mm_P4mm
J3L_VinN_inown_footprints:Flachstecker_8mm_B6.3mm_P4mm
J4H_VinL_inown_footprints:Flachstecker_8mm_B6.3mm_P4mm
J9Lid-Connector FFCConnector_Wuerth:FPC_8-pin_vertical_686108188622
L12.2uHInductor_SMD:L_0805_2012Metric_Pad1.15x1.40mm_HandSolder
PS1PBO-1-S5Converter_ACDC:Converter_ACDC_CUI_PBO-3-Sxx_THT_Vertical
R11megResistor_SMD:R_1206_3216Metric_Pad1.42x1.75mm_HandSolder
R21megResistor_SMD:R_1206_3216Metric_Pad1.42x1.75mm_HandSolder
R31megResistor_SMD:R_1206_3216Metric_Pad1.42x1.75mm_HandSolder
R41megResistor_SMD:R_1206_3216Metric_Pad1.42x1.75mm_HandSolder
R51megResistor_SMD:R_0805_2012Metric_Pad1.15x1.40mm_HandSolder
R610kResistor_SMD:R_0603_1608Metric_Pad0.98x0.95mm_HandSolder
REF**MountingHole_2.5mmMountingHole:MountingHole_2.5mm
RS13kResistor_SMD:R_0805_2012Metric_Pad1.15x1.40mm_HandSolder
RV1MOVVaristor:RV_Disc_D7mm_W5.7mm_P5mm
U1UCC12040Package_SO:SOIC-16W_7.5x10.3mm_P1.27mm
U2ACS71020Package_SO:SOIC-16W_7.5x10.3mm_P1.27mm
U3Teensy4.0teensy:Teensy40
U4Si8641Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
VINNTestPoint_Pad_D1.5mmTestPoint:TestPoint_Pad_D1.5mm
VINPTestPoint_Pad_D1.5mmTestPoint:TestPoint_Pad_D1.5mm

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.