Reference layout

WENERR PACHECO ELECTIVA 2025 C1 BOARD2

WenerrP-WENERR_PACHECO_ELECTIVA_2025_C1-board2-WENERR_PACHECO_ELECTIVA_2025_C1-layout

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WenerrP-WENERR_PACHECO_ELECTIVA_2025_C1-board2-WENERR_PACHECO_ELECTIVA_2025_C1-layout

The project archive carries the board, its project file and the upstream licence. The archive is zstd-compressed (tar.zst).

25Placed parts
20Nets
2Copper layers
62.15 × 21 mmBoard size
yesRouted
KiCad 9File format

Bill of materials

25 distinct parts

3 resolve to something in the catalog — click through to the footprint.

RefValueFootprintQty
C110uFPCM_JLCPCB:C_CASE-A-3216-18(mm)
C210uFPCM_JLCPCB:C_CASE-A-3216-18(mm)
C310nFPCM_JLCPCB:C_0402
C410nFPCM_JLCPCB:C_0402
C510nFPCM_JLCPCB:C_0402
C610nFPCM_JLCPCB:C_0402
C710nFPCM_JLCPCB:C_0402
C810nFPCM_JLCPCB:C_0402
D1USBLC6-2SC6EasyEDA:SOT-23-6_L2.9-W1.6-P0.95-LS2.8-BL
D2USBLC6-2SC6EasyEDA:SOT-23-6_L2.9-W1.6-P0.95-LS2.8-BL
L1Choke_Wurth_WE-CNSW_744232090Inductor_SMD:L_CommonMode_Wurth_WE-CNSW-1206
L2Choke_Wurth_WE-CNSW_744232090Inductor_SMD:L_CommonMode_Wurth_WE-CNSW-1206
R11kΩPCM_JLCPCB:R_0402
R100ΩPCM_JLCPCB:R_0402
R110ΩPCM_JLCPCB:R_0402
R120ΩPCM_JLCPCB:R_0402
R130ΩPCM_JLCPCB:R_0402
R140ΩPCM_JLCPCB:R_0402
R150ΩPCM_JLCPCB:R_0402
R160ΩPCM_JLCPCB:R_0402
R170ΩPCM_JLCPCB:R_0402
U1ADUM3160BRWZEasyEDA:WSOIC-16_L10.3-W7.5-P1.27-LS10.3-BL
U2B0505S-1WConverter_DCDC:Converter_DCDC_TRACO_TEA1-xxxx_THT
USB1AF 90° WJDGEasyEDA:USB-A-TH_AF-WJDG
USB3USB-B12-BRWEasyEDA:USB-B-TH_USB-B12-BRW

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.