Reference layout

Netzteilplatine duale Spannungsversorgung

apxco-Kicad-board15-Kicad-layout

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apxco-Kicad-board15-Kicad-layout

The project archive carries the board, its project file and the upstream licence. The archive is zstd-compressed (tar.zst).

57Placed parts
9Nets
2Copper layers
161 × 86 mmBoard size
yesRouted
KiCad 9File format

Bill of materials

57 distinct parts

57 resolve to something in the catalog — click through to the footprint.

RefValueFootprintQty
C1C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C10C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C11C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C12C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C13C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C14C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C15C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C16C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C17C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C18C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C19C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C2C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C20C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C21C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C22C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C23C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C24C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C25C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C26C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C27C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C28C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C29C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C3C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C30C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C31C_SmallCapacitor_THT:C_Axial_L12.0mm_D6.5mm_P15.00mm_Horizontal
C32CCapacitor_THT:C_Rect_L16.5mm_W5.0mm_P15.00mm_MKT
C33CCapacitor_THT:C_Rect_L16.5mm_W5.0mm_P15.00mm_MKT
C4C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C5C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C6C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C7C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C8C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
C9C_PolarizedCapacitor_THT:CP_Radial_D10.0mm_P5.00mm_P7.50mm
D11N5408Diode_THT:D_DO-201AD_P15.24mm_Horizontal
D21N5408Diode_THT:D_DO-201AD_P15.24mm_Horizontal
D3D_Bridge_-AA+Diode_THT:Diode_Bridge_Vishay_GBU
D41N5408Diode_THT:D_DO-201AD_P15.24mm_Horizontal
D51N5408Diode_THT:D_DO-201AD_P15.24mm_Horizontal
D6LEDLED_THT:LED_D3.0mm_Clear
D7LEDLED_THT:LED_D3.0mm_Clear
Show the other 17
F1FuseFuse:Fuseholder_Littelfuse_100_series_5x20mm
F2FuseFuse:Fuseholder_Littelfuse_100_series_5x20mm
H1MountingHole_PadMountingHole:MountingHole_3.2mm_M3_Pad_TopBottom
H10MountingHoleMountingHole:MountingHole_3.5mm_Pad
H11MountingHoleMountingHole:MountingHole_3.5mm_Pad
H2MountingHole_PadMountingHole:MountingHole_3.2mm_M3_Pad_TopBottom
H3MountingHole_PadMountingHole:MountingHole_3.2mm_M3_Pad_TopBottom
H4MountingHole_PadMountingHole:MountingHole_3.2mm_M3_Pad_TopBottom
H5MountingHole_PadMountingHole:MountingHole_3.2mm_M3_Pad_TopBottom
H6MountingHoleMountingHole:MountingHole_3.5mm_Pad
H7MountingHoleMountingHole:MountingHole_3.5mm_Pad
H8MountingHole_PadMountingHole:MountingHole_3.2mm_M3_Pad_TopBottom
H9MountingHoleMountingHole:MountingHole_3.5mm_Pad
J1Conn_01x04_FemaleTerminalBlock_RND:TerminalBlock_RND_205-00278_1x04_P5.00mm_Vertical
J2Conn_01x06_FemaleTerminalBlock_RND:TerminalBlock_RND_205-00060_1x06_P5.00mm_45Degree
R1RResistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal
R2RResistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal

Provenance

Repository
apxco/Kicad
Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.