Reference layout

YuriCable Pro Max PCB

arag0re-yuricable-pro-max-pcb-kicad-yuricable-pro-max-pcb-kicad-layout

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arag0re-yuricable-pro-max-pcb-kicad-yuricable-pro-max-pcb-kicad-layout

The project archive carries the board, its project file and the upstream licence. The archive is zstd-compressed (tar.zst).

13Placed parts
16Nets
2Copper layers
66.18 × 24.14 mmBoard size
yesRouted
KiCad 8File format

Bill of materials

5 distinct parts

2 resolve to something in the catalog — click through to the footprint.

RefValueFootprintQty
———
1x8PinsPinHeader_1x08_P2.54mm_Vertical_SMD_Pin1LeftConnector_PinHeader_2.54mm:PinHeader_1x08_P2.54mm_Vertical_SMD_Pin1Left
G***LOGOYuriCable:Untitled
REF**PinHeader_1x10_P2.54mm_Vertical_SMD_Pin1LeftConnector_PinHeader_2.54mm:PinHeader_1x10_P2.54mm_Vertical_SMD_Pin1Left
Skinny SWD SMTAdafruit 4048 Skinny SWD SMTARM-JTAG-SWD:Adafruit 4048 Skinny SWD SMT

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.