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Reference schematic

Green Net

benjisu03-green-net-3-green-net-schematic

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benjisu03-green-net-3-green-net-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
52Placed parts
16Net labels
KiCad 8File format

Bill of materials

52 distinct parts

50 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
C1022uDevice:C
C1122uDevice:C
C121uDevice:C
C130.1uDevice:C
C1410pDevice:C
C154.7uDevice:C
C1610pDevice:C
C170.1uDevice:C
C1810pDevice:C
C191uDevice:C
C2010uDevice:C
C410uDevice:C
C510uDevice:C
C610uDevice:C
C70.1uDevice:C
C80.1uDevice:C
C90.1uDevice:C
D10DSS14UDevice:D_Schottky_Filled
D11DSS14UDevice:D_Schottky_Filled
D12GreenDevice:LED_Filled
D13GreenDevice:LED_Filled
D4D5V0M1U2S9Device:D_Zener_Filled
D5D5V0M1U2S9Device:D_Zener_Filled
D6D5V0M1U2S9Device:D_Zener_Filled
D7D5V0M1U2S9Device:D_Zener_Filled
D8D5V0M1U2S9Device:D_Zener_Filled
D9D5V0M1U2S9Device:D_Zener_Filled
J5Conn_01x03_PinConnector:Conn_01x03_Pin
L13.9uDevice:L
Q22N7002KTransistor_FET:2N7002K
R125.1kDevice:R_US
R135.1kDevice:R_US
R145.1kDevice:R_US
R155.1kDevice:R_US
R16150RDevice:R_US
R17150RDevice:R_US
R181kDevice:R_US
TP10USB_D+Connector:TestPoint
TP11USB_UART_D-Connector:TestPoint
TP12USB_UART_D+Connector:TestPoint
Show the other 12
TP13SOIL_SENSEConnector:TestPoint
TP5UART_TXDConnector:TestPoint
TP6UART_RXDConnector:TestPoint
TP7VBUSConnector:TestPoint
TP8SOIL_ENConnector:TestPoint
TP9USB_D-Connector:TestPoint
U2USB_C_Receptacle_12PAA_Connectors:USB_C_Receptacle_12P
U3USB_C_Receptacle_12PAA_Connectors:USB_C_Receptacle_12P
U4AP63203WURegulator_Switching:AP63203WU
U5BME280Sensor:BME280
U6CP2102N-A02-GQFN28Interface_USB:CP2102N-Axx-xQFN28
U7LTR-303ALS-01Sensor_Optical:LTR-303ALS-01

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.