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SeniorDesignProject BOARD2

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The project archive carries the board, its project file and the upstream licence. The archive is zstd-compressed (tar.zst).

47Placed parts
54Nets
2Copper layers
93.98 × 85.09 mmBoard size
yesRouted
KiCad 9File format

Bill of materials

45 distinct parts

43 resolve to something in the catalog — click through to the footprint.

RefValueFootprintQty
A1SC0918Raspberry_Pi_Pico_W:MODULE_SC0918
C11uFCapacitor_THT:C_Disc_D7.5mm_W4.4mm_P5.00mm
C1110nFCapacitor_THT:C_Disc_D7.5mm_W4.4mm_P5.00mm
C12270uFCapacitor_THT:CP_Radial_D6.3mm_P2.50mm
C14330uFCapacitor_THT:CP_Radial_D10.0mm_P5.00mm
C210uFCapacitor_THT:C_Disc_D7.5mm_W4.4mm_P5.00mm
C3500uFCapacitor_THT:CP_Radial_D12.5mm_P5.00mm
C40.1uFCapacitor_THT:C_Disc_D7.5mm_W4.4mm_P5.00mm
C55uFCapacitor_THT:C_Disc_D7.5mm_W4.4mm_P5.00mm
C62uFCapacitor_THT:C_Disc_D7.5mm_W4.4mm_P5.00mm
D11N5817Diode_THT:D_A-405_P12.70mm_Horizontal
H1MountingHole_PadMountingHole:MountingHole_3.2mm_M3_Pad
H2MountingHole_PadMountingHole:MountingHole_3.2mm_M3_Pad
H3MountingHole_PadMountingHole:MountingHole_3.2mm_M3_Pad
H4MountingHole_PadMountingHole:MountingHole_3.2mm_M3_Pad
J1Terminal_2TerminalBlock_Phoenix:TerminalBlock_Phoenix_PT-1,5-2-3.5-H_1x02_P3.50mm_Horizontal
J2Terminal_3TerminalBlock_Phoenix:TerminalBlock_Phoenix_PT-1,5-3-3.5-H_1x03_P3.50mm_Horizontal
J354-00166BarrelJack:CONN3_54-00166_TEN
JP1Jumper_NCTestPoint:TestPoint_2Pads_Pitch2.54mm_Drill0.8mm
JP2Jumper_NCTestPoint:TestPoint_2Pads_Pitch2.54mm_Drill0.8mm
JP3Jumper_NCTestPoint:TestPoint_2Pads_Pitch2.54mm_Drill0.8mm
L157uHPackage_DIP:DIP-8_W7.62mm
Q1DMG2305UX-13Package_TO_SOT_SMD:SOT-23-3
R12.7Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P15.24mm_Horizontal
R210kResistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P15.24mm_Horizontal
REF**Symbol_Danger_8x8mm_CopperSymbol:Symbol_Danger_8x8mm_Copper
REF**KiCad-Logo2_5mm_SilkScreenSymbol:KiCad-Logo2_5mm_SilkScreen
REF**OSHW-Logo2_9.8x8mm_SilkScreenSymbol:OSHW-Logo2_9.8x8mm_SilkScreen
REF**Smolhaj_Scale_0.1Symbol:Smolhaj_Scale_0.1
REF**Polarity_Center_Positive_6mm_SilkScreenSymbol:Polarity_Center_Positive_6mm_SilkScreen
RV1Trim_PotPotentiometer_THT:Potentiometer_Bourns_3296W_Vertical
TP15VoltsTestPoint:TestPoint_THTPad_D2.5mm_Drill1.2mm
TP10MicInTestPoint:TestPoint_THTPad_D2.5mm_Drill1.2mm
TP224VoltsTestPoint:TestPoint_THTPad_D2.5mm_Drill1.2mm
TP3GroundTestPoint:TestPoint_THTPad_D2.5mm_Drill1.2mm
TP4ON/~{OFF}TestPoint:TestPoint_THTPad_D2.5mm_Drill1.2mm
TP5AmpOutTestPoint:TestPoint_THTPad_D2.5mm_Drill1.2mm
TP6AmpInTestPoint:TestPoint_THTPad_D2.5mm_Drill1.2mm
TP73V_RefTestPoint:TestPoint_THTPad_D2.5mm_Drill1.2mm
TP8DAC_OutTestPoint:TestPoint_THTPad_D2.5mm_Drill1.2mm
Show the other 5
TP9DAC_RefTestPoint:TestPoint_THTPad_D2.5mm_Drill1.2mm
U1LM384Package_DIP:DIP-14_W7.62mm_Socket
U2LM4040LP-3Package_TO_SOT_THT:TO-92_Inline_Wide
U3LM2675N-5Package_DIP:DIP-8_W7.62mm
U4LTC1655LCN8Package_DIP:DIP-8_W7.62mm

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.