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Reference layout

Z280 S100

cm68-Z280-S100-z280-s100-layout

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cm68-Z280-S100-z280-s100-layout

The project archive carries the board, its project file and the upstream licence. The archive is zstd-compressed (tar.zst).

61Placed parts
277Nets
4Copper layers
254 × 134.62 mmBoard size
yesRouted
KiCad 9File format

Bill of materials

61 distinct parts

32 resolve to something in the catalog — click through to the footprint.

RefValueFootprintQty
——PATCH
C10.1uFCapacitor_THT:C_Disc_D5.0mm_W2.5mm_P2.50mm
C100.1uFCAP-2
C110.1uFCAP-2
C120.1uFCAP-2
C130.1uFCAP-2
C140.1uFCAP-2
C150.1uFCAP-2
C160.1uFCAP-2
C170.1uFCAP-2
C180.1uFCAP-2
C190.1uFCAP-2
C20.1uFCapacitor_THT:C_Disc_D5.0mm_W2.5mm_P2.50mm
C200.1uFCAP-2
C210.1uFCAP-2
C220.1uFCAP-2
C230.1uFCAP-2
C30.1uFCapacitor_THT:C_Disc_D5.0mm_W2.5mm_P2.50mm
C40.1uFCapacitor_THT:C_Disc_D5.0mm_W2.5mm_P2.50mm
C50.1uFCapacitor_THT:C_Disc_D5.0mm_W2.5mm_P2.50mm
C60.1uFCAP-2
C70.1uFCAP-2
C80.1uFCAP-2
C90.1uFCAP-2
J10ConfigHDR-3x8
J11SLAVE_ONLYConnector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical
J7Serial (2x5)Connector_PinHeader_2.54mm:PinHeader_2x05_P2.54mm_Vertical
J9JTAGHDR-6
R11k pRDYHDR-2
R21k XRDYHDR-2
R31k SLAVE_ONLYHDR-2
R41k SIXTNHDR-2
U1Z280 (ZBUS)Package_LCC:PLCC-68_THT-Socket
U1028C256 evenPackage_DIP:DIP-28_W15.24mm
U1128C256 oddPackage_DIP:DIP-28_W15.24mm
U127805HDR-3
U13DS1813HDR-3
U14MAX232Package_DIP:DIP-16_W7.62mm
U1574F245Package_DIP:DIP-20_W7.62mm
U1674F245Package_DIP:DIP-20_W7.62mm
Show the other 21
U1774F245Package_DIP:DIP-20_W7.62mm
U1874F245Package_DIP:DIP-20_W7.62mm
U1974F245Package_DIP:DIP-20_W7.62mm
U274F573Package_DIP:DIP-20_W7.62mm
U2074F245Package_DIP:DIP-20_W7.62mm
U2174HCT244Package_DIP:DIP-20_W7.62mm
U2274F138Package_DIP:DIP-16_W7.62mm
U2374F521Package_DIP:DIP-20_W7.62mm
U2474F521Package_DIP:DIP-20_W7.62mm
U2574F245Package_DIP:DIP-20_W7.62mm
U2674F245Package_DIP:DIP-20_W7.62mm
U27LM323KPackage_TO_SOT_THT:TO-3
U374F573Package_DIP:DIP-20_W7.62mm
U4ATF1508 controlPackage_LCC:PLCC-84_THT-Socket
U5ATF1508 dataPackage_LCC:PLCC-84_THT-Socket
U6SRAM0 evenPackage_DIP:DIP-32_W15.24mm
U7SRAM0 oddPackage_DIP:DIP-32_W15.24mm
U8SRAM1 evenPackage_DIP:DIP-32_W15.24mm
U9SRAM1 oddPackage_DIP:DIP-32_W15.24mm
V 0.1 curt@zen-room.orgZ280 16 Bit MasterS100_MALE
Y124 MHz crystalHDR-2

Provenance

Commit
b17e6a3d8643590f49014fa0f01e79e77fd102b9
Licence
CERN-OHL-P-2.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.