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Reference layout

SAFMC 2025 CatE Dev

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The project archive carries the board, its project file and the upstream licence. The archive is zstd-compressed (tar.zst).

34Placed parts
46Nets
4Copper layers
25 × 25 mmBoard size
yesRouted
KiCad 7File format

Bill of materials

34 distinct parts

34 resolve to something in the catalog — click through to the footprint.

RefValueFootprintQty
C122uCapacitor_SMD:C_0603_1608Metric
C247uCapacitor_SMD:C_0805_2012Metric
C31uCapacitor_SMD:C_0402_1005Metric
C41uCapacitor_SMD:C_0402_1005Metric
C51uCapacitor_SMD:C_0402_1005Metric
C61uCapacitor_SMD:C_0402_1005Metric
C71uCapacitor_SMD:C_0402_1005Metric
H1MountingHoleMountingHole:MountingHole_2.2mm_M2
H2MountingHoleMountingHole:MountingHole_2.2mm_M2
H3MountingHoleMountingHole:MountingHole_2.2mm_M2
H4MountingHoleMountingHole:MountingHole_2.2mm_M2
J1Conn_01x30_MountingPinConnector_FFC-FPC:Hirose_FH12-30S-0.5SH_1x30-1MP_P0.50mm_Horizontal
J2Conn_01x24_MountingPinConnector_FFC-FPC:Hirose_FH12-24S-0.5SH_1x24-1MP_P0.50mm_Horizontal
J5Conn_01x22_MountingPinConnector_FFC-FPC:Hirose_FH12-22S-0.5SH_1x22-1MP_P0.50mm_Horizontal
L1LInductor_SMD:L_0603_1608Metric
L2L_Ferrite_Coupled_Small_1243Inductor_SMD:L_CommonModeChoke_Coilcraft_0603USB
L3L_Ferrite_Coupled_Small_1243Inductor_SMD:L_CommonModeChoke_Coilcraft_0603USB
L4L_Ferrite_Coupled_Small_1243Inductor_SMD:L_CommonModeChoke_Coilcraft_0603USB
L5LInductor_SMD:L_0603_1608Metric
L62.2uInductor_SMD:L_1008_2520Metric
Q1DMG1024UVPackage_TO_SOT_SMD:SOT-563
R1RResistor_SMD:R_0402_1005Metric
R130Resistor_SMD:R_0402_1005Metric
R2RResistor_SMD:R_0402_1005Metric
R3RResistor_SMD:R_0402_1005Metric
R4RResistor_SMD:R_0402_1005Metric
R5RResistor_SMD:R_0402_1005Metric
R6RResistor_SMD:R_0402_1005Metric
R72k2Resistor_SMD:R_0402_1005Metric
R82k2Resistor_SMD:R_0402_1005Metric
U1AP3429KPackage_TO_SOT_SMD:TSOT-23-6
U3ADP123Package_TO_SOT_SMD:TSOT-23-5
U4ADP123Package_TO_SOT_SMD:TSOT-23-5
X127MHzCrystal:Crystal_SMD_2016-4Pin_2.0x1.6mm

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.