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Reference layout

Duodyne BOARD4

danwerner21-duodyne-board4-duodyne-layout

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danwerner21-duodyne-board4-duodyne-layout

The project archive carries the board, its project file and the upstream licence. The archive is zstd-compressed (tar.zst).

48Placed parts
80Nets
2Copper layers
235 × 80 mmBoard size
yesRouted
KiCad 6File format

Bill of materials

48 distinct parts

34 resolve to something in the catalog — click through to the footprint.

RefValueFootprintQty
Brd1SSD1306SSD1306:128x64OLED
C10.1uCapacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm
C310uCapacitor_THT:CP_Radial_D5.0mm_P2.50mm
C410uCapacitor_THT:CP_Radial_D5.0mm_P2.50mm
C50.1uCapacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm
D1LEDLED_THT:LED_D3.0mm
D10BI-COLOR LEDLED_THT:LED_D5.0mm
D2LEDLED_THT:LED_D3.0mm
D3LEDLED_THT:LED_D3.0mm
D4LEDLED_THT:LED_D3.0mm
D5LEDLED_THT:LED_D3.0mm
D6LEDLED_THT:LED_D3.0mm
D7LEDLED_THT:LED_D3.0mm
D8LEDLED_THT:LED_D3.0mm
D9LEDLED_THT:LED_D3.0mm
H1MountingHoleMountingHole:MountingHole_3.2mm_M3_Pad
H2MountingHoleMountingHole:MountingHole_3.2mm_M3_Pad
H3MountingHoleMountingHole:MountingHole_3.2mm_M3_Pad
H4MountingHoleMountingHole:MountingHole_3.2mm_M3_Pad
J1FPANELConnector_IDC:IDC-Header_2x20_P2.54mm_Horizontal
J2TTL SERIALConnector_PinHeader_2.54mm:PinHeader_1x06_P2.54mm_Horizontal
J3MICRO SD CARDAdafruit MicroSD Module:Adafruit MicroSD Module
J4UPDI ONLYConnector_PinHeader_2.54mm:PinHeader_1x06_P2.54mm_Horizontal
NT1NetTie_2NetTie:NetTie-2_THT_Pad0.3mm
Q1TN0702Package_TO_SOT_THT:TO-92_HandSolder
Q2TN0702Package_TO_SOT_THT:TO-92_HandSolder
R110KResistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal
R210KResistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal
R3220Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal
R44700Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal
R6470Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal
RN1470Resistor_THT:R_Array_SIP9
SW1SW_SPDTSW_Toggle_Blue_wSlots:SW_Toggle_Blue_wSlots
SW10SW_SPDTSW_Toggle_Blue_wSlots:SW_Toggle_Blue_wSlots
SW11SW_SPDTSW_Toggle_Blue_wSlots:SW_Toggle_Blue_wSlots
SW12SW_SPDTSW_Toggle_Blue_wSlots:SW_Toggle_Blue_wSlots
SW13SW_SPDTSW_Toggle_Blue_wSlots:SW_Toggle_Blue_wSlots
SW2SW_SPDTSW_Toggle_Blue_wSlots:SW_Toggle_Blue_wSlots
SW3SW_SPDTSW_Toggle_Blue_wSlots:SW_Toggle_Blue_wSlots
SW4SW_SPDTSW_Toggle_Blue_wSlots:SW_Toggle_Blue_wSlots
Show the other 8
SW5SW_SPDTSW_Toggle_Blue_wSlots:SW_Toggle_Blue_wSlots
SW6SW_SPDTSW_Toggle_Blue_wSlots:SW_Toggle_Blue_wSlots
SW7SW_SPDTSW_Toggle_Blue_wSlots:SW_Toggle_Blue_wSlots
SW8SW_SPDTSW_Toggle_Blue_wSlots:SW_Toggle_Blue_wSlots
SW9SW_PushButton_Switch_THT:SW_PUSH_6mm
U174LS240Package_DIP:DIP-20_W7.62mm
U3LP2950-3.3_TO92Package_TO_SOT_THT:TO-92_HandSolder
U4ATtiny1614-SSPackage_SO:SOIC-14_3.9x8.7mm_P1.27mm

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.