Reference layout

Setup Kvm 3 BOARD2

duplow-setup-kvm-3-board2-setup-kvm-3-layout

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duplow-setup-kvm-3-board2-setup-kvm-3-layout

The project archive carries the board, its project file and the upstream licence. The archive is zstd-compressed (tar.zst).

19Placed parts
124Nets
4Copper layers
100 × 75 mmBoard size
yesRouted
KiCad 7File format

Bill of materials

16 distinct parts

12 resolve to something in the catalog — click through to the footprint.

RefValueFootprintQty
D1LEDLED_SMD:LED_0805_2012Metric_Pad1.15x1.40mm_HandSolder
D2LEDLED_SMD:LED_0805_2012Metric_Pad1.15x1.40mm_HandSolder
D3LEDLED_SMD:LED_0805_2012Metric_Pad1.15x1.40mm_HandSolder
DI1Connector DP IN 47272-0024Connector_Displayport:47272-0024
DI2Connector DP IN 47272-0024Connector_Displayport:47272-0024
DI3Connector DP IN 47272-0024Connector_Displayport:47272-0024
DO1Connector DP OUT 47272-0024Connector_Displayport:47272-0024
R1R75Resistor_SMD:R_0805_2012Metric
R2R75Resistor_SMD:R_0805_2012Metric
R3R75Resistor_SMD:R_0805_2012Metric
R410KResistor_SMD:R_0805_2012Metric
R510KResistor_SMD:R_0805_2012Metric
REF**PinSocket_1x04_P2.54mm_VerticalConnector_PinSocket_2.54mm:PinSocket_1x04_P2.54mm_Vertical
REF**MountingHole_3.2mm_M3_Pad_ViaMountingHole:MountingHole_3.2mm_M3_Pad_Via
S1HD3SS215IRTQRPackage_DFN_QFN:QFN-56-1EP_8x8mm_P0.5mm_EP4.3x4.3mm_ThermalVias
S2HD3SS215IRTQRPackage_DFN_QFN:QFN-56-1EP_8x8mm_P0.5mm_EP4.3x4.3mm_ThermalVias

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.