Reference schematic

Ultimate invitation card

espena-ultimate-invitation-card-ultimate-invitation-card-schematic

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espena-ultimate-invitation-card-ultimate-invitation-card-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
57Placed parts
0Net labels
KiCad 7File format

Bill of materials

55 distinct parts

45 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
BT13xAAA LiDevice_espena:Battery_3cell
BZ1PiezoDevice_espena:Buzzer
C1100nFDevice:C
C2100nFDevice:C
C3100nFDevice:C
C41uFDevice:C
C5C_DecouplingDevice_espena:C_Decoupling
C6C_DecouplingDevice_espena:C_Decoupling
D1BAT54WDevice:D_Schottky_Filled
D2BAT54WDevice:D_Schottky_Filled
D3REDDevice:LED_Filled
D4GREENDevice:LED_Filled
D5BLUE [A]Device:LED_Filled
D6BLUE [B]Device:LED_Filled
D7BLUE [C]Device:LED_Filled
D8BLUE [D]Device:LED_Filled
D9BAT54WDevice:D_Schottky_Filled
F12ADevice:Fuse
J1UARTConnector_Generic_espena:Conn_01x04_without_pin2
JP1RED WIREJumper:Jumper_2_Bridged
JP2GREEN WIREJumper:Jumper_2_Bridged
Q1BSH205G2ATransistor_FET_espena:BSH205G2A
Q2BSH103BKRTransistor_FET_espena:BSH103BK
R11MDevice:R
R10100Device:R
R11100Device:R
R12100Device:R
R13100Device:R
R142k4Device:R
R152k4Device:R
R161kDevice:R
R172k4Device:R
R182k4Device:R
R192k4Device:R
R21kDevice:R
R202k4Device:R
R214k7Device:R
R310kDevice:R
R410kDevice:R
R52k4Device:R
Show the other 15
R610kDevice:R
R710kDevice:R
R8100Device:R
R9100Device:R
SW1RESETSwitch:SW_Push
SW2STARTSwitch:SW_Push
SW3[A]Switch:SW_Push
SW4[B]Switch:SW_Push
SW5[C]Switch:SW_Push
SW6[D]Switch:SW_Push
SW7BOOTSwitch:SW_Push
U174LVC2G1474xGxx_espena:74LVC2G14
U2TC2117-3.3VDBTRRegulator_Linear:NCP1117-3.3_SOT223
U3WROVER-B/ERF_Module_espena:ESP32-WROVER-B_2
U40.96" OLEDDisplay_graphic_espena:OLED-SSD1306_0.96_i2c

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.