Reference layout
Ace 2019 BOARD19
flypie-Ace-2019-board19-Ace-2019-layout
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flypie-Ace-2019-board19-Ace-2019-layout
The project archive carries the board, its project file and the upstream licence. The archive is zstd-compressed (tar.zst).
20Placed parts
135Nets
2Copper layers
75.56 × 69.22 mmBoard size
yesRouted
KiCad 6File format
Bill of materials
20 distinct parts
20 resolve to something in the catalog — click through to the footprint.
| Ref | Value | Footprint | Qty |
|---|---|---|---|
| LED0 | HDSP-7803 | Display_7Segment:HDSP-7801 | |
| LED1 | HDSP-7803 | Display_7Segment:HDSP-7801 | |
| LED2 | HDSP-7803 | Display_7Segment:HDSP-7801 | |
| LED3 | HDSP-7803 | Display_7Segment:HDSP-7801 | |
| LED4 | HDSP-7803 | Display_7Segment:HDSP-7801 | |
| LED5 | HDSP-7803 | Display_7Segment:HDSP-7801 | |
| LED6 | HDSP-7803 | Display_7Segment:HDSP-7801 | |
| LED7 | HDSP-7803 | Display_7Segment:HDSP-7801 | |
| U1 | 74ACT238 | Package_DIP:DIP-16_W7.62mm | |
| U10 | 74LS573 | Package_DIP:DIP-20_W7.62mm | |
| U11 | 74LS573 | Package_DIP:DIP-20_W7.62mm | |
| U2 | 74LS27 | Package_DIP:DIP-14_W7.62mm | |
| U3 | 74LS573 | Package_DIP:DIP-20_W7.62mm | |
| U4 | 74LS573 | Package_DIP:DIP-20_W7.62mm | |
| U5 | 74LS08 | Package_DIP:DIP-14_W7.62mm | |
| U6 | 74LS573 | Package_DIP:DIP-20_W7.62mm | |
| U7 | 74LS573 | Package_DIP:DIP-20_W7.62mm | |
| U8 | 74LS573 | Package_DIP:DIP-20_W7.62mm | |
| U9 | 74LS573 | Package_DIP:DIP-20_W7.62mm | |
| Z80CPUIN1 | Conn_02x24_Odd_Even | Connector_PinSocket_2.54mm:PinSocket_2x24_P2.54mm_Horizontal |
Provenance
- Repository
- flypie/Ace-2019 ↗
- Commit
- unknown
- Licence
- CC-BY-4.0
How it is used
Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.