Reference schematic

RAM128 (GW4208B)

garrettsworkshop-RAM128-RAM128-schematic

Loading the viewer…

garrettsworkshop-RAM128-RAM128-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
75Placed parts
77Net labels
KiCad 7File format

Bill of materials

55 distinct parts

42 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
C110uDevice:C_Small
C102u2Device:C_Small
C112u2Device:C_Small
C122u2Device:C_Small
C132u2Device:C_Small
C142u2Device:C_Small
C152u2Device:C_Small
C1610uDevice:C_Small
C172u2Device:C_Small
C182u2Device:C_Small
C22u2Device:C_Small
C32u2Device:C_Small
C42u2Device:C_Small
C52u2Device:C_Small
C62u2Device:C_Small
C72u2Device:C_Small
C82u2Device:C_Small
C92u2Device:C_Small
FID1FiducialMechanical:Fiducial
FID2FiducialMechanical:Fiducial
FID3FiducialMechanical:Fiducial
FID4FiducialMechanical:Fiducial
H1 Mechanical:MountingHole
H2 Mechanical:MountingHole
H3 Mechanical:MountingHole
H4 Mechanical:MountingHole
H5 Mechanical:MountingHole
J1AppleIIBusConnector_Generic:Conn_02x25_Counter_Clockwise
R122kDevice:R_Small
R222kDevice:R_Small
R322kDevice:R_Small
R422kDevice:R_Small
R50Device:R_Small
R6DNPDevice:R_Small
SW1DMA/ROMSwitch:SW_DIP_x02
U1621024GW_RAM:SRAM-128Kx8-SOP-32
U1074AHCT32PW74xx:74LS32
U1174AHCT1G126GWGW_Logic:741G126GW
U1274AHCT1G04GWGW_Logic:741G04GW
U1374AHCT1G04GWGW_Logic:741G04GW
Show the other 15
U1474AHCT1G04GWGW_Logic:741G04GW
U1574AHCT1G04GWGW_Logic:741G04GW
U1674AHCT1G04GWGW_Logic:741G04GW
U1774AHCT1G04GWGW_Logic:741G04GW
U1874AHCT1G32GWGW_Logic:741G32GW
U1974AHCT1G04GWGW_Logic:741G04GW
U274HCT245PWGW_Logic:74245
U2074AHCT1G04GWGW_Logic:741G04GW
U374HCT273PW74xx:74LS273
U474HCT273PW74xx:74LS273
U574AHCT1G32GWGW_Logic:741G32GW
U674AHCT08PW74xx:74LS08
U774AHCT32PW74xx:74LS32
U874AHCT08PW74xx:74LS08
U974AHCT08PW74xx:74LS08

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.