Reference schematic

sample

ice458-KiCad_Drafting_Symbols-KiCad_Drafting_Symbols-schematic

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ice458-KiCad_Drafting_Symbols-KiCad_Drafting_Symbols-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
95Placed parts
13Net labels
KiCad 9File format

Bill of materials

95 distinct parts

None of these names match a library the catalog carries.

RefValueSymbolQty
C1CDrafting_Symbols:C_Drafting
C2CDrafting_Symbols:C_Drafting
C3C_TrimDrafting_Symbols:C_Trim_Drafting
I_AC1I_ACDrafting_Symbols:I_AC
I_DC1I_{ref}Drafting_Symbols:I_DC
I_DC2I_DCDrafting_Symbols:I_DC
I_Pulse1I_PulseDrafting_Symbols:I_Pulse
L1LDrafting_Symbols:L_Drafting
M1NMOS4pin_1Drafting_Symbols:NMOS4pin_1
M10NMOS3pin_1Drafting_Symbols:NMOS3pin_1
M11NMOS3pin_2Drafting_Symbols:NMOS3pin_2
M12NMOS4pin_1Drafting_Symbols:NMOS4pin_1
M13NMOS4pinDrafting_Symbols:NMOS4pin_2
M14PMOS3pin_1Drafting_Symbols:PMOS3pin_1
M15PMOS3pin_2Drafting_Symbols:PMOS3pin_2
M16PMOS4pin_1Drafting_Symbols:PMOS4pin_1
M17PMOS4pinDrafting_Symbols:PMOS4pin_2
M2PMOS4pin_1Drafting_Symbols:PMOS4pin_1
M3NMOS4pin_1Drafting_Symbols:NMOS4pin_1
M4NMOS4pin_1Drafting_Symbols:NMOS4pin_1
M5PMOS4pin_1Drafting_Symbols:PMOS4pin_1
M6NMOS4pin_1Drafting_Symbols:NMOS4pin_1
M7PMOS4pin_1Drafting_Symbols:PMOS4pin_1
M8NMOS4pin_1Drafting_Symbols:NMOS4pin_1
M9NMOS3pin_1Drafting_Symbols:NMOS3pin_1
Q1NPNDrafting_Symbols:NPN
Q2PNPDrafting_Symbols:PNP
R1RDrafting_Symbols:R_Drafting
R2RDrafting_Symbols:R_Drafting
R3RDrafting_Symbols:R_Drafting
R4RDrafting_Symbols:R_Drafting
R5RDrafting_Symbols:R_Drafting
R6RDrafting_Symbols:R_Trim_Drafting
RV1R_POTDrafting_Symbols:R_Potentiometer_Drafting
SW1SW_CMOSDrafting_Symbols:SW_CMOS
SW2SW_SPDTDrafting_Symbols:SW_SPDT
SW3SW_SPST_OFFDrafting_Symbols:SW_SPST_OFF
SW4SW_SPST_ONDrafting_Symbols:SW_SPST_ON
U1nand21Drafting_Symbols:nand21
U10or31Drafting_Symbols:or31
Show the other 55
U11xnor21Drafting_Symbols:xnor21
U12xnor31Drafting_Symbols:xnor31
U13xor21Drafting_Symbols:xor21
U14xor31Drafting_Symbols:xor31
U15GND_DraftingDrafting_Symbols:GND_Drafting
U16V_{DD}Drafting_Symbols:VDD_Drafting
U17RS_FFDrafting_Symbols:RS_FF
U18D_FFDrafting_Symbols:D_FF
U19D_FF_RDrafting_Symbols:D_FF_R
U2nand31Drafting_Symbols:nand31
U20D_FF_R_SDrafting_Symbols:D_FF_R_S
U21V_{DD}Drafting_Symbols:VDD_Drafting
U22JK_FFDrafting_Symbols:JK_FF
U23T_FFDrafting_Symbols:T_FF
U24GND_DraftingDrafting_Symbols:GND_Drafting
U25OP_AMPDrafting_Symbols:OP_AMP
U26OP_AMPDrafting_Symbols:OP_AMP
U27GND_DraftingDrafting_Symbols:GND_Drafting
U28V_{DD}Drafting_Symbols:VDD_Drafting
U29RS_FFDrafting_Symbols:RS_FF
U3and21Drafting_Symbols:and21
U30MUX21Drafting_Symbols:MUX21
U31MUX31Drafting_Symbols:MUX31
U32MUX41Drafting_Symbols:MUX41
U33OP_AMPDrafting_Symbols:OP_AMP
U34Differential_AMPDrafting_Symbols:Differential_AMP_2
U35Differential_AMPDrafting_Symbols:Differential_AMP_1
U36V_{DD}Drafting_Symbols:VDD_Drafting
U37GND_DraftingDrafting_Symbols:GND_Drafting
U38nand21Drafting_Symbols:nand21
U39notDrafting_Symbols:not
U4and31Drafting_Symbols:and31
U40VDD_DraftingDrafting_Symbols:VDD_Drafting
U41GND_DraftingDrafting_Symbols:GND_Drafting
U42V_{DD}Drafting_Symbols:VDD_Drafting
U43D_FF_RDrafting_Symbols:D_FF_R
U44~Drafting_Symbols:Generic_Symbol
U45nor21Drafting_Symbols:nor21
U46D_FF_RDrafting_Symbols:D_FF_R
U47D_FF_RDrafting_Symbols:D_FF_R
U48nor21Drafting_Symbols:nor21
U49D_FF_RDrafting_Symbols:D_FF_R
U5notDrafting_Symbols:not
U50delayDrafting_Symbols:buf
U51D_FF_RDrafting_Symbols:D_FF_R
U52~Drafting_Symbols:Generic_Symbol
U53or31Drafting_Symbols:or31
U54~Drafting_Symbols:Generic_Symbol
U6bufDrafting_Symbols:buf
U7nor21Drafting_Symbols:nor21
U8nor31Drafting_Symbols:nor31
U9or21Drafting_Symbols:or21
V_AC1V_ACDrafting_Symbols:V_AC
V_DC1V_DCDrafting_Symbols:V_DC
V_Pulse1V_PulseDrafting_Symbols:V_Pulse

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.