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Reference schematic

STM32F030

jedp-STM32F030-breakout-STM32F030-breakout-schematic

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jedp-STM32F030-breakout-STM32F030-breakout-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
44Placed parts
43Net labels
KiCad 6File format

Bill of materials

44 distinct parts

42 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
C122pFDevice:C_Small
C101uFDevice:C_Small
C110.01uFDevice:C_Small
C122.2uFDevice:C_Small
C130.1uFDevice:C_Small
C144.7uFDevice:C_Small
C152.2uFDevice:C_Small
C20.1uFDevice:C_Small
C322pFDevice:C_Small
C40.1uFDevice:C_Small
C50.1uFDevice:C_Small
C60.1uFDevice:C_Small
C70.1uFDevice:C_Small
C81uFDevice:C_Small
C910uFDevice:C_Small
D1LED_PWRDevice:LED_Small
D2PESD5V0L4UFPower_Protection:PESD5V0L4UF
D3LED_USERDevice:LED_Small
FB1FerriteBeadDevice:FerriteBead
FB2FerriteBead 0803Device:FerriteBead
H1MountingHoleMechanical:MountingHole
H2MountingHoleMechanical:MountingHole
J1Conn_01x24Connector_Generic:Conn_01x24
J2Conn_01x24Connector_Generic:Conn_01x24
J3Conn_01x02_FemaleConnector:Conn_01x02_Female
J5TagConnect_TC2030Connector:Conn_ARM_SWD_TagConnect_TC2030
J6USB_C_Receptacle_USB2.0Connector:USB_C_Receptacle_USB2.0
JP1BOOT0=1Jumper:SolderJumper_2_Open
NT1NetTie_2Device:NetTie_2
R110kDevice:R_Small_US
R21kDevice:R_Small_US
R3R0Device:R_Small_US
R45.1kDevice:R_Small_US
R55.1kDevice:R_Small_US
R61kDevice:R_Small_US
Reset1SW_PushSwitch:SW_Push
TP1TestPointConnector:TestPoint
TP2TestPointConnector:TestPoint
TP3TestPointConnector:TestPoint
U1STM32F030C8TxMCU_ST_STM32F0:STM32F030C8Tx
Show the other 4
U2MCP1802x-xx02xOTRegulator_Linear:MCP1802x-xx02xOT
U3LP5907MFX-3.3Regulator_Linear:LP5907MFX-3.3
X1ASE-xxxMHzOscillator:ASE-xxxMHz
Y1CrystalDevice:Crystal

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.