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Reference layout

A500 8MB FastRAM

jgilcas-A500-8MB-FastRAM-A500-8MB-FastRAM-layout

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jgilcas-A500-8MB-FastRAM-A500-8MB-FastRAM-layout

The project archive carries the board, its project file and the upstream licence. The archive is zstd-compressed (tar.zst).

31Placed parts
108Nets
2Copper layers
87.63 × 87.63 mmBoard size
yesRouted
KiCad 5File format

Bill of materials

31 distinct parts

27 resolve to something in the catalog — click through to the footprint.

RefValueFootprintQty
C10.1uFCapacitor_THT:C_Axial_L3.8mm_D2.6mm_P7.50mm_Horizontal
C100.1uFCapacitor_THT:C_Axial_L3.8mm_D2.6mm_P7.50mm_Horizontal
C110.1uFCapacitor_THT:C_Axial_L3.8mm_D2.6mm_P7.50mm_Horizontal
C120.1uFCapacitor_THT:C_Axial_L3.8mm_D2.6mm_P7.50mm_Horizontal
C130.1uFCapacitor_THT:C_Axial_L3.8mm_D2.6mm_P7.50mm_Horizontal
C140.1uFCapacitor_THT:C_Axial_L3.8mm_D2.6mm_P7.50mm_Horizontal
C150.1uFCapacitor_THT:C_Axial_L3.8mm_D2.6mm_P7.50mm_Horizontal
C160.1uFCapacitor_THT:C_Axial_L3.8mm_D2.6mm_P7.50mm_Horizontal
C180.1uFCapacitor_THT:C_Axial_L3.8mm_D2.6mm_P7.50mm_Horizontal
C20.1uFCapacitor_THT:C_Axial_L3.8mm_D2.6mm_P7.50mm_Horizontal
C30.1uFCapacitor_THT:C_Axial_L3.8mm_D2.6mm_P7.50mm_Horizontal
C40.1uFCapacitor_THT:C_Axial_L3.8mm_D2.6mm_P7.50mm_Horizontal
C50.1uFCapacitor_THT:C_Axial_L3.8mm_D2.6mm_P7.50mm_Horizontal
C60.1uFCapacitor_THT:C_Axial_L3.8mm_D2.6mm_P7.50mm_Horizontal
C70.1uFCapacitor_THT:C_Axial_L3.8mm_D2.6mm_P7.50mm_Horizontal
C80.1uFCapacitor_THT:C_Axial_L3.8mm_D2.6mm_P7.50mm_Horizontal
C90.1uFCapacitor_THT:C_Axial_L3.8mm_D2.6mm_P7.50mm_Horizontal
J1Microsemi_FlashPro-JTAG-10Connector_IDC:IDC-Header_2x05_P2.54mm_Vertical
R110kResistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal
R210kResistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal
R310kResistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal
U168000 BoardsidePackage_DIP:DIP-64_W22.86mm_Socket_LongPads
U10TPS7333QPPackage_DIP:DIP-8_W7.62mm
U268000 SocketPackage_DIP:DIP-64_W22.86mm_Socket_LongPads
U3ATF1502ASV-15JU44Package_LCC:PLCC-44_THT-Socket
U474157Package_DIP:DIP-16_W7.62mm
U574157Package_DIP:DIP-16_W7.62mm
U6IS41LV16100DPackage_SO_J-Lead:SOJ-42
U7IS41LV16100DPackage_SO_J-Lead:SOJ-42
U8IS41LV16100DPackage_SO_J-Lead:SOJ-42
U9IS41LV16100DPackage_SO_J-Lead:SOJ-42

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.