Reference layout
DragonATXProtoUART
jimbro1000-DragonATXProtoUART-DragonATXProtoUART-layout
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jimbro1000-DragonATXProtoUART-DragonATXProtoUART-layout
The project archive carries the board, its project file and the upstream licence. The archive is zstd-compressed (tar.zst).
15Placed parts
140Nets
2Copper layers
168.68 × 59 mmBoard size
yesRouted
KiCad 9File format
Bill of materials
15 distinct parts
14 resolve to something in the catalog — click through to the footprint.
| Ref | Value | Footprint | Qty |
|---|---|---|---|
| C16 | 10u | Capacitor_THT:CP_Radial_D6.3mm_P2.50mm | |
| C17 | 100n | Capacitor_THT:C_Disc_D4.3mm_W1.9mm_P5.00mm | |
| C18 | 30pF | Capacitor_THT:C_Disc_D4.3mm_W1.9mm_P5.00mm | |
| C20 | 10u | Capacitor_THT:CP_Radial_D6.3mm_P2.50mm | |
| C21 | 10u | Capacitor_THT:CP_Radial_D6.3mm_P2.50mm | |
| C24 | 10u | Capacitor_THT:CP_Radial_D6.3mm_P2.50mm | |
| IC11 | 74LS138 | Package_DIP:DIP-16_W7.62mm | |
| IC12 | W65C51 | Package_LCC:PLCC-28_THT-Socket | |
| IC13 | MAX232 | Package_DIP:DIP-16_W7.62mm | |
| IC14 | M48Tx2 | Package_DIP:DIP-24_18.0mmx34.29mm_W15.24mm | |
| IC15 | 74LS21 | Package_DIP:DIP-14_W7.62mm | |
| PL1 | ~ | Library:Card_Edge | |
| PL9 | rs232 serial port | Connector_Dsub:DSUB-9_Socket_Horizontal_P2.77x2.84mm_EdgePinOffset9.90mm_Housed_MountingHolesOffset11.32mm | |
| R30 | 1M | Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal | |
| X2 | 1.8432MHz | Crystal:Crystal_HC18-U_Vertical |
Provenance
- Repository
- jimbro1000/DragonATXProtoUART ↗
- Commit
- unknown
- Licence
- CC-BY-4.0
How it is used
Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.