Reference schematic
Boulder Clock Replacent Bord
mickdassive-boulder_clock_replacent_bord-boulder_clock_replacent_bord-schematic
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mickdassive-boulder_clock_replacent_bord-boulder_clock_replacent_bord-schematic
Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).
Bill of materials
24 distinct parts
22 resolve to something in the catalog — click through to the component.
| Ref | Value | Symbol | Qty |
|---|---|---|---|
| C23 | 0uF1 | Device:C | |
| C24 | 0uF1 | Device:C | |
| C25 | 4uF7 | Device:C | |
| C26 | 1uF | Device:C | |
| C27 | 0uF1 | Device:C | |
| C28 | 250BXC22MEFC10X16 22uF | Device:C_Polarized_US | |
| C29 | 10uF | Device:C | |
| C30 | C1206X104K251T 0uF1 | Device:C | |
| D1 | NHP140SFT3G | Device:D | |
| J2 | USB4515-GF-A | Connector:USB_C_Receptacle_USB2.0_14P | |
| L1 | BRL3225T1R5M 1uH5 | Device:L | |
| L2 | NS10145T470MNVV 47uH | Device:L | |
| Q21 | FQD12N20LTM-F085P | Simulation_SPICE:NMOS | |
| R36 | 330R | Device:R | |
| R37 | 5K1 | Device:R | |
| R38 | 5K1 | Device:R | |
| R39 | 1K | Device:R | |
| R40 | PVG3A102C01R00 1K | Device:R_Trim | |
| R41 | 47K | Device:R | |
| R42 | 1M | Device:R | |
| R43 | 2K2 | Device:R | |
| R44 | PVG3A502C01R00 5K | Device:R_Trim | |
| U11 | HV9150 | nixie:HV9150 | |
| U12 | TPS63031DSKR | nixie:TPS63031DSKR |
Provenance
- Commit
- unknown
- Licence
- CC-BY-4.0
How it is used
Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.