Reference schematic

CCD

novvoo-sitina1-2-sitina1-schematic

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novvoo-sitina1-2-sitina1-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
28Placed parts
27Net labels
KiCad 8File format

Bill of materials

28 distinct parts

26 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
C1804.7uFDevice:C
C181100nFDevice:C
C42100nFDevice:C
C434.7uFDevice:C
C444.7uFDevice:C
C4522uF 25VDevice:C
C46100nFDevice:C
C47100nFDevice:C
C48100nFDevice:C
C49100nFDevice:C
C50100nFDevice:C
C51100nFDevice:C
C5222uF 25VDevice:C
FB10120RDevice:FerriteBead
FB5120RDevice:FerriteBead
FB6120RDevice:FerriteBead
FB7120RDevice:FerriteBead
FB8120RDevice:FerriteBead
FB9120RDevice:FerriteBead
R290Device:R_US
R3082K 1%Device:R_US
R31270K 1%Device:R_US
R3222KDevice:R_US
R3320KDevice:R_US
R340Device:R_US
U10KAI-1100xSitina:KAI-1100x
U8TPS72301symbols:TPS723xx
U9TMP1075DGKSensor_Temperature:TMP1075DGK

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.