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Reference layout

Electronics BOARD18

orri93-electronics-board18-electronics-layout

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orri93-electronics-board18-electronics-layout

The project archive carries the board, its project file and the upstream licence. The archive is zstd-compressed (tar.zst).

27Placed parts
11Nets
2Copper layers
83.57 × 51.82 mmBoard size
yesRouted
KiCad 8File format

Bill of materials

27 distinct parts

27 resolve to something in the catalog — click through to the footprint.

RefValueFootprintQty
C1330uFCapacitor_THT:CP_Radial_D8.0mm_P3.50mm
C2330uFCapacitor_THT:CP_Radial_D8.0mm_P3.50mm
C368nFCapacitor_THT:C_Rect_L7.0mm_W2.5mm_P5.00mm
C42.2uFCapacitor_SMD:CP_Elec_4x5.4
C52.2uFCapacitor_SMD:CP_Elec_4x5.4
D11N4005Diode_THT:D_DO-41_SOD81_P10.16mm_Horizontal
D21N4005Diode_THT:D_DO-41_SOD81_P10.16mm_Horizontal
J15VConnector_Pin:Pin_D1.1mm_L8.5mm_W2.5mm_FlatFork
J10NEUTRALConnector_Pin:Pin_D1.1mm_L8.5mm_W2.5mm_FlatFork
J2GNDConnector_Pin:Pin_D1.1mm_L8.5mm_W2.5mm_FlatFork
J3+VDCConnector_Pin:Pin_D1.1mm_L8.5mm_W2.5mm_FlatFork
J4GND VDCConnector_Pin:Pin_D1.1mm_L8.5mm_W2.5mm_FlatFork
J5-VDCConnector_Pin:Pin_D1.1mm_L8.5mm_W2.5mm_FlatFork
J6Zero crossing detConnector_Pin:Pin_D1.1mm_L8.5mm_W2.5mm_FlatFork
J7VDC AConnector_Pin:Pin_D1.1mm_L8.5mm_W2.5mm_FlatFork
J8VDC BConnector_Pin:Pin_D1.1mm_L8.5mm_W2.5mm_FlatFork
J9LIVEConnector_Pin:Pin_D1.1mm_L8.5mm_W2.5mm_FlatFork
Q1BC547Package_TO_SOT_THT:TO-92_Inline
Q2BC547Package_TO_SOT_THT:TO-92_Inline
Q3BC547Package_TO_SOT_THT:TO-92_Inline
R11MResistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal
R268kResistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal
R31MResistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal
R4330kResistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal
R510kResistor_SMD:R_1206_3216Metric_Pad1.30x1.75mm_HandSolder
R610kResistor_SMD:R_1206_3216Metric_Pad1.30x1.75mm_HandSolder
U1L7805Package_TO_SOT_THT:TO-220-3_Vertical

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.