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Reference layout

Electronics BOARD19

orri93-electronics-board19-electronics-layout

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orri93-electronics-board19-electronics-layout

The project archive carries the board, its project file and the upstream licence. The archive is zstd-compressed (tar.zst).

41Placed parts
26Nets
2Copper layers
93.47 × 67.31 mmBoard size
yesRouted
KiCad 8File format

Bill of materials

41 distinct parts

41 resolve to something in the catalog — click through to the footprint.

RefValueFootprintQty
C168pFCapacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder
C2220pFCapacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder
C31nFCapacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder
C4100pFCapacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder
C52.2uFCapacitor_SMD:CP_Elec_4x5.4
C62.2uFCapacitor_SMD:CP_Elec_4x5.4
C7100nFCapacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder
C80.1uFCapacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder
C90.1uFCapacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder
D11N4148Diode_THT:D_DO-35_SOD27_P7.62mm_Horizontal
D21N4148Diode_THT:D_DO-35_SOD27_P7.62mm_Horizontal
D3TRIACPackage_TO_SOT_THT:TO-220-3_Vertical
J1Input 1Connector_Pin:Pin_D1.1mm_L8.5mm_W2.5mm_FlatFork
J10GND VDCConnector_Pin:Pin_D1.1mm_L8.5mm_W2.5mm_FlatFork
J11-VDCConnector_Pin:Pin_D1.1mm_L8.5mm_W2.5mm_FlatFork
J2Input 2Connector_Pin:Pin_D1.1mm_L8.5mm_W2.5mm_FlatFork
J3Input GNDConnector_Pin:Pin_D1.1mm_L8.5mm_W2.5mm_FlatFork
J4Zero crossing detConnector_Pin:Pin_D1.1mm_L8.5mm_W2.5mm_FlatFork
J5Output 1Connector_Pin:Pin_D1.1mm_L8.5mm_W2.5mm_FlatFork
J6Output 2Connector_Pin:Pin_D1.1mm_L8.5mm_W2.5mm_FlatFork
J7Output GNDConnector_Pin:Pin_D1.1mm_L8.5mm_W2.5mm_FlatFork
J8Conn_WallSocketTerminalBlock_Phoenix:TerminalBlock_Phoenix_MKDS-1,5-2-5.08_1x02_P5.08mm_Horizontal
J9+VDCConnector_Pin:Pin_D1.1mm_L8.5mm_W2.5mm_FlatFork
L1L_FerriteFerrite_THT:LairdTech_28C0236-0JW-10
Q1BC547Package_TO_SOT_THT:TO-92_Inline
Q2BC547Package_TO_SOT_THT:TO-92_Inline
R11MResistor_SMD:R_1206_3216Metric_Pad1.30x1.75mm_HandSolder
R21MResistor_SMD:R_1206_3216Metric_Pad1.30x1.75mm_HandSolder
R3330kResistor_SMD:R_1206_3216Metric_Pad1.30x1.75mm_HandSolder
R4330kResistor_SMD:R_1206_3216Metric_Pad1.30x1.75mm_HandSolder
R51kResistor_SMD:R_1206_3216Metric_Pad1.30x1.75mm_HandSolder
R61kResistor_SMD:R_1206_3216Metric_Pad1.30x1.75mm_HandSolder
RV11MPotentiometer_THT:Potentiometer_Alps_RK163_Single_Horizontal
RV21MPotentiometer_THT:Potentiometer_Alps_RK163_Single_Horizontal
RV3100kPotentiometer_THT:Potentiometer_Alps_RK163_Single_Horizontal
TP1GNDTestPoint:TestPoint_Loop_D2.50mm_Drill1.0mm
TP2Tre TP ATestPoint:TestPoint_Loop_D2.50mm_Drill1.0mm
TP3HiM TP ATestPoint:TestPoint_Loop_D2.50mm_Drill1.0mm
TP4Tre TP BTestPoint:TestPoint_Loop_D2.50mm_Drill1.0mm
TP5Tre TP BTestPoint:TestPoint_Loop_D2.50mm_Drill1.0mm
Show the other 1
U1TL084Package_SO:TSSOP-14_4.4x5mm_P0.65mm

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.