Reference schematic

EspressoMachineBoard HW

parya03-EspressoMachineBoard_HW-EspressoMachineBoard_HW-schematic

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parya03-EspressoMachineBoard_HW-EspressoMachineBoard_HW-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
51Placed parts
11Net labels
KiCad 8File format

Bill of materials

51 distinct parts

49 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
C10.01uDevice:C
C30.01uDevice:C
D1D_ZenerDevice:D_Zener
D2PTVS6V0S1UR-QXDiode:ESD5Zxx
D3MP01EA06Device:D_Schottky
D4LEDDevice:LED
F11ADevice:Fuse
H5MountingHoleMechanical:MountingHole
H6MountingHoleMechanical:MountingHole
J2Conn_01x08_PinConnector:Conn_01x08_Pin
J3B3P-VH__LF__SN_B3P-VH:B3P-VH__LF__SN_
J4Conn_01x02_PinConnector:Conn_01x02_Pin
J5Conn_01x02_PinConnector:Conn_01x02_Pin
J6Conn_01x03_PinConnector:Conn_01x03_Pin
J7Screw_Terminal_01x02Connector:Screw_Terminal_01x02
J8Screw_Terminal_01x02Connector:Screw_Terminal_01x02
J9Conn_01x02_PinConnector:Conn_01x02_Pin
JP1Jumper_2_OpenJumper:Jumper_2_Open
K1G2RL-1A-E-HA DC5Relay:G2RL-1A-E
Q1NMOSSimulation_SPICE:NMOS
Q3BTA16-600BTriac_Thyristor:BTA16-600B
Q4NMOSSimulation_SPICE:NMOS
Q5BTA16-600BTriac_Thyristor:BTA16-600B
Q6NMOSSimulation_SPICE:NMOS
R11kDevice:R
R101kDevice:R
R11360Device:R
R12220Device:R
R1339Device:R
R14330Device:R
R151kDevice:R
R1610kDevice:R
R1720kDevice:R
R2220Device:R
R2010kDevice:R
R2110kDevice:R
R347kDevice:R
R410kDevice:R
R547kDevice:R
R6360Device:R
Show the other 11
R7220Device:R
R839Device:R
R9330Device:R
TP1TestPointConnector:TestPoint
TP2TestPointConnector:TestPoint
TP3TestPointConnector:TestPoint
TP6TestPointConnector:TestPoint
U1LTV-354TIsolator:LTV-354T
U2FOD420Relay_SolidState:FOD420
U3FOD420Relay_SolidState:FOD420
U45V700mA 3.5WWX-DC12003:WX-DC12003

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.