Reference schematic

FPGA Config

retraux-design-accelerator-devkit-4-accelerator-devkit-schematic

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retraux-design-accelerator-devkit-4-accelerator-devkit-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
25Placed parts
23Net labels
KiCad 6 pre-releaseFile format

Bill of materials

16 distinct parts

11 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
C670.1uFDevice:C_Small
D4LED_ARGBDevice:LED_ARGB
J1JTAGConnector_Generic:Conn_02x03_Odd_Even
Q1CSD13381F4Transistor_FET:BSS123
R1410KDevice_RD:R_Pack04_Small_Split
R1510KDevice:R_Small
R1610KDevice_RD:R_Pack04_Small_Split
R201K1Device:R_Small
R24500Device_RD:R_Pack04_Small_Split
R265K1Device:R_Small
R275K1Device:R_Small
R285K1Device:R_Small
R3010KDevice:R_Small
R315K1Device:R_Small
U1LFE5U-45-caBGA256FPGA_Lattice_RD:LFE5U-XX-XBG256
U12W25Q512JVBIQMemory_Flash_RD:W25Q512JVBIQ

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.