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Reference layout

Senior Design BOARD2

ritter30-senior-design-board2-senior-design-layout

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ritter30-senior-design-board2-senior-design-layout

The project archive carries the board, its project file and the upstream licence. The archive is zstd-compressed (tar.zst).

38Placed parts
25Nets
2Copper layers
97 × 39 mmBoard size
yesRouted
KiCad 7File format

Bill of materials

38 distinct parts

37 resolve to something in the catalog — click through to the footprint.

RefValueFootprintQty
C10.1uCapacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder
C210uCapacitor_THT:CP_Radial_D5.0mm_P2.00mm
C31uCapacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder
C422uCapacitor_THT:CP_Radial_D5.0mm_P2.00mm
C51uCapacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder
C60.1uCapacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder
C782uCapacitor_THT:CP_Radial_D5.0mm_P2.00mm
D11N5819Diode_THT:D_DO-41_SOD81_P10.16mm_Horizontal
D21N5819Diode_THT:D_DO-41_SOD81_P10.16mm_Horizontal
D3Red LEDLED_THT:LED_D5.0mm
J1Conn_01x02_SocketConnector_PinHeader_1.27mm:PinHeader_1x02_P1.27mm_Vertical
J2Conn_01x02_SocketConnector_PinHeader_1.27mm:PinHeader_1x02_P1.27mm_Vertical
J3Conn_01x02_SocketConnector_PinHeader_1.27mm:PinHeader_1x02_P1.27mm_Vertical
JP1Jumper_2_OpenJumper:SolderJumper-2_P1.3mm_Open_RoundedPad1.0x1.5mm
L12.2uInductor_THT:L_Radial_D9.5mm_P5.00mm_Fastron_07HVP
Q1IRF9630Package_TO_SOT_THT:TO-220-3_Vertical
R110kResistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder
R10250Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder
R21MResistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder
R395.3kResistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder
R430.9kResistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder
R510kResistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder
R610kResistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder
R71kResistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder
R830kResistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder
R9100kResistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder
SW1SW_DPSTGAINS_FOOTPRINTS:Power Switch
TP1TestPointConnector_PinHeader_1.00mm:PinHeader_1x01_P1.00mm_Vertical
TP2TestPointConnector_PinHeader_1.00mm:PinHeader_1x01_P1.00mm_Vertical
TP3TestPointConnector_PinHeader_1.00mm:PinHeader_1x01_P1.00mm_Vertical
TP4TestPointConnector_PinHeader_1.00mm:PinHeader_1x01_P1.00mm_Vertical
TP5TestPointConnector_PinHeader_1.00mm:PinHeader_1x01_P1.00mm_Vertical
TP6TestPointConnector_PinHeader_1.00mm:PinHeader_1x01_P1.00mm_Vertical
U1UCC39562Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
U2LTC3426Package_TO_SOT_SMD:TSOT-23-6_HandSoldering
U3MCP73811TPackage_TO_SOT_SMD:SOT-23-5_HandSoldering
U4MAX40200AUKPackage_TO_SOT_SMD:SOT-23-5_HandSoldering
U5MCP602Package_DIP:DIP-8_W7.62mm

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.