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Reference layout

FPGA Console board

robfinch-Cores-board10-Cores-layout

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robfinch-Cores-board10-Cores-layout

The project archive carries the board, its project file and the upstream licence. The archive is zstd-compressed (tar.zst).

69Placed parts
254Nets
4Copper layers
224.01 × 120.14 mmBoard size
yesRouted
KiCad 6File format

Bill of materials

69 distinct parts

69 resolve to something in the catalog — click through to the footprint.

RefValueFootprintQty
C10.1uCapacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm
C100.1uCapacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm
C110.1uCapacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm
C140.1uCapacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm
C150.1uCapacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm
C18A10.01uCapacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm
C18B10.01uCapacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm
C30.1uCapacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm
C30100uCapacitor_THT:CP_Radial_D5.0mm_P2.50mm
C310.1uCapacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm
C320.047uCapacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm
C33100uCapacitor_THT:CP_Radial_D8.0mm_P3.80mm
C3410uCapacitor_THT:CP_Radial_D5.0mm_P2.50mm
C35220uCapacitor_THT:CP_Radial_D8.0mm_P3.80mm
C360.047uCapacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm
C40.1uCapacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm
C5010uCapacitor_THT:CP_Radial_D5.0mm_P2.50mm
C5110uCapacitor_THT:CP_Radial_D5.0mm_P2.50mm
C60.1uCapacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm
C70.1uCapacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm
C80.1uCapacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm
C90.1uCapacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm
D1DIODEDiode_THT:D_A-405_P10.16mm_Horizontal
J1Bus_ISA_16bitConnector_PCBEdge:BUS_AT
J2Audio InConnector_Audio:Jack_3.5mm_CUI_SJ1-3533NG_Horizontal
J3AudioJack2Connector_Audio:Jack_3.5mm_CUI_SJ1-3533NG_Horizontal
JP1Jumper_2_OpenConnector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical
JP2Jumper_2_BridgedConnector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical
R12k2Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal
R1010Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal
R1110kResistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal
R123k3Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal
R210kResistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal
R310kResistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal
R4220kResistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal
R510kResistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal
R512.2kResistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal
R5210kResistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal
R63k3Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal
R73k3Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal
Show the other 29
R85k1Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal
R95k1Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal
RN13k3Resistor_THT:R_Array_SIP9
RN23k3Resistor_THT:R_Array_SIP5
RN33k3Resistor_THT:R_Array_SIP9
RN410kResistor_THT:R_Array_SIP9
U174LS240_SplitPackage_DIP:DIP-20_W7.62mm_Socket
U1074LVC245Package_DIP:DIP-20_W7.62mm_Socket
U11W65C816SPPackage_DIP:DIP-40_W15.24mm_Socket
U12CModA7Package_DIP:DIP-48_W15.24mm_Socket
U13CModA7Package_DIP:DIP-48_W15.24mm_Socket
U1474LVC163Package_DIP:DIP-16_W7.62mm_Socket
U1574LVC74Package_DIP:DIP-14_W7.62mm_Socket
U16CModA7Package_DIP:DIP-48_W15.24mm_Socket
U17VDIP2-32Package_DIP:DIP-32_W15.24mm_Socket
U18ICS525R-02Package_SO:SSOP-28_3.9x9.9mm_P0.635mm
U19LM741Package_DIP:DIP-8_W7.62mm_Socket
U274LVC00Package_DIP:DIP-14_W7.62mm_Socket
U20LM386Package_DIP:DIP-8_W7.62mm_Socket
U21DS1818Package_TO_SOT_THT:TO-92
U22DS1818Package_TO_SOT_THT:TO-92
U374LVC245Package_DIP:DIP-20_W7.62mm_Socket
U474LVC245Package_DIP:DIP-20_W7.62mm_Socket
U50AMS1117-3.3Package_TO_SOT_SMD:SOT-223-3_TabPin2
U674LVC245Package_DIP:DIP-20_W7.62mm_Socket
U774LVC573Package_DIP:DIP-20_W7.62mm_Socket
U874LVC245Package_DIP:DIP-20_W7.62mm_Socket
U974LVC245Package_DIP:DIP-20_W7.62mm_Socket
X114.31818 MHzOscillator:Oscillator_DIP-14

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.