Reference schematic

6S Active Balancer

sebritt-VOLTN_SOLEX-3-VOLTN_SOLEX-schematic

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sebritt-VOLTN_SOLEX-3-VOLTN_SOLEX-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
93Placed parts
65Net labels
KiCad 8File format

Bill of materials

93 distinct parts

80 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
C1${CBYPASS}Device:C_Polarized
C10${CSNUB}Device:C
C11${CBYPASS}Device:C_Polarized
C12${CSNUB}Device:C
C13${CSNUB}Device:C
C14${CBYPASS}Device:C_Polarized
C15${CSNUB}Device:C
C16${CSNUB}Device:C
C17${CBYPASS}Device:C_Polarized
C18${CSNUB}Device:C
C19${CSNUB}Device:C
C2${CSNUB}Device:C
C20${CBOOST+}Device:C
C21${CBYPASS_DECOP}Device:C
C22${CBYPASS_DECOP}Device:C
C23${CBYPASS_DECOP}Device:C
C24${CBYPASS_DECOP}Device:C
C25${CBYPASS_DECOP}Device:C
C26${CBYPASS_DECOP}Device:C
C3${CSNUB}Device:C
C4${CBOOST}Device:C
C5${CBYPASS}Device:C_Polarized
C6${CSNUB}Device:C
C7${CSNUB}Device:C
C8${CBYPASS}Device:C_Polarized
C9${CSNUB}Device:C
D1D_SchottkyDevice:D_Schottky
J1Conn_01x01_SocketConnector:Conn_01x01_Socket
J10Conn_01x01_SocketConnector:Conn_01x01_Socket
J2JST_XH_6pin_SPIConnector:Conn_01x06_Socket
J3Conn_01x01_SocketConnector:Conn_01x01_Socket
J4Conn_01x01_SocketConnector:Conn_01x01_Socket
J5Conn_01x01_SocketConnector:Conn_01x01_Socket
J6Conn_01x01_SocketConnector:Conn_01x01_Socket
J7Conn_01x01_SocketConnector:Conn_01x01_Socket
J8Conn_01x01_SocketConnector:Conn_01x01_Socket
J9Conn_01x01_SocketConnector:Conn_01x01_Socket
JP1JUMPER_A1Jumper:SolderJumper_3_Open
JP2JUMPER_A2Jumper:SolderJumper_3_Open
JP3JUMPER_A3Jumper:SolderJumper_3_Open
Show the other 53
JP4JUMPER_A4Jumper:SolderJumper_3_Open
JP5JUMPER_A5Jumper:SolderJumper_3_Open
JP6JUMPER_EN_NUM_ISO_INJumper:SolderJumper_3_Open
JP7JUMPER_EN_NUM_ISO_OUTJumper:SolderJumper_3_Open
JP8Whatchdog TimerJumper:SolderJumper_3_Open
Q1${FET-N}Device:Q_NMOS_Depletion_DGS
Q10${FET-N}Device:Q_NMOS_Depletion_DGS
Q11${FET-N}Device:Q_NMOS_Depletion_DGS
Q12${FET-N}Device:Q_NMOS_Depletion_DGS
Q2${FET-N}Device:Q_NMOS_Depletion_DGS
Q3${FET-N}Device:Q_NMOS_Depletion_DGS
Q4${FET-N}Device:Q_NMOS_Depletion_DGS
Q5${FET-N}Device:Q_NMOS_Depletion_DGS
Q6${FET-N}Device:Q_NMOS_Depletion_DGS
Q7${FET-N}Device:Q_NMOS_Depletion_DGS
Q8${FET-N}Device:Q_NMOS_Depletion_DGS
Q9${FET-N}Device:Q_NMOS_Depletion_DGS
R1${RSENSS}Device:R
R10${RSENSS}Device:R
R11${RSNUB}Device:R
R12${RSENSP}Device:R
R13${RSNUB}Device:R
R14${RSENSS}Device:R
R15${RSNUB}Device:R
R16${RSENSP}Device:R
R17${RSNUB}Device:R
R18${RSENSS}Device:R
R19${RSNUB}Device:R
R2${RSENSP}Device:R
R20${RSENSP}Device:R
R21${RSNUB}Device:R
R22${RSENSS}Device:R
R23${RSNUB}Device:R
R24${RSENSP}Device:R
R25${RSNUB}Device:R
R26${RSENSS}Device:R
R27${RBOOST+}Device:R
R28${RWDT}Device:R
R3${RSNUB}Device:R
R4${RSNUB}Device:R
R5${RTONP}Device:R
R6${RTONS}Device:R
R7${RSNUB}Device:R
R8${RSENSP}Device:R
R9${RSNUB}Device:R
T1${TRANSFORMER}Device:Transformer_1P_1S
T2${TRANSFORMER}Device:Transformer_1P_1S
T3${TRANSFORMER}Device:Transformer_1P_1S
T4${TRANSFORMER}Device:Transformer_1P_1S
T5${TRANSFORMER}Device:Transformer_1P_1S
T6${TRANSFORMER}Device:Transformer_1P_1S
U1LTC3300ILXE-2_PBFactive_balancer_lib:LTC3300ILXE-2_PBF
U2ADuM1401xRWIsolator:ADuM1401xRW

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.