Reference schematic

486 Sandy River Motherboard

skiselev-sandy_river_486-7-sandy_river_486-schematic

Loading the viewer…

skiselev-sandy_river_486-7-sandy_river_486-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
63Placed parts
23Net labels
KiCad 6File format

Bill of materials

53 distinct parts

50 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
C400.1uFDevice:C
C410.1uFDevice:C
C60110uFDevice:C_Polarized_US
C6021uFDevice:C_Polarized_US
C6031uFDevice:C_Polarized_US
C640?pFDevice:C
C641?pFDevice:C
D11N4148Device:D
D21N4148Device:D
D51N4148Device:D
J11ATX_POWER_20my_components:ATX_POWER_20
J12Front PanelConnector_Generic:Conn_02x10_Odd_Even
JP117CPU FrequencyConnector_Generic:Conn_02x03_Odd_Even
JP295V / Low CPU VoltageConnector_Generic:Conn_02x03_Odd_Even
JP45V / 3.3V CPU VoltageConnector_Generic:Conn_02x03_Odd_Even
JP45Low Voltage Select: 3.3V/3.45V/4VConnector_Generic:Conn_02x03_Odd_Even
JP609-5V SourceJumper:Jumper_3_Bridged12
LS1AT-1224TWTRDevice:Speaker
R17330Device:R
R1851Device:R
R1933Device:R
R2633Device:R
R4433Device:R
R4533Device:R
R510kDevice:R
R57243Device:R
R58150Device:R
R61010kDevice:R
R61110kDevice:R
R612470Device:R
R631kDevice:R
R641kDevice:R
R7575Device:R
R7622Device:R
R933Device:R
SW1POWERmy_components:Switch_Tactile
SW2RESETmy_components:Switch_Tactile
TC1322uFDevice:C_Polarized_US
TC14220uFDevice:C_Polarized_US
TP1GPCS#Connector:TestPoint
Show the other 13
TP2DOZE#Connector:TestPoint
U1174F3274xx:74LS32
U28LT1086-ADJRegulator_Linear:LT1086-ADJ
U374LS1474xx:74LS14
U674LS0774xx:74LS07
U60374HCT7474xx:74LS74
U60474HCT1474xx:74LS14
U606LM7905_TO220Regulator_Linear:LM7905_TO220
U607IDT514Oscillator:NB3N502
X114.31818MHzOscillator:CXO_DIP8
X233.333MHzOscillator:CXO_DIP8
X38MHzOscillator:CXO_DIP8
Y214.31818MHzDevice:Crystal_Small

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.