Reference schematic

Pico Logic Analyzer

tandej-pico-logic-analyzer-pico-logic-analyzer-schematic

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tandej-pico-logic-analyzer-pico-logic-analyzer-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
16Placed parts
18Net labels
KiCad 9File format

Bill of materials

10 distinct parts

10 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
C84.7 uFDevice:C
C94.7 uFDevice:C
D56.2 V_{z}, prefer better tolerancesDevice:D_Zener_Dual_CommonAnode_KKA
D76.2 V_{z}, prefer better tolerancesDevice:D_Zener_Dual_CommonAnode_KKA
J5Conn_02x03_Odd_EvenConnector_Generic:Conn_02x03_Odd_Even
J7Conn_02x03_Odd_EvenConnector_Generic:Conn_02x03_Odd_Even
RN3100kDevice:R_Pack04_SIP_Split
RN5470Device:R_Pack04_SIP_Split
SW3SW_DIP_x04Switch:SW_DIP_x04
U4TXB0104PW (fit with U104)Logic_LevelTranslator:TXB0104PW

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.