Reference schematic

DS1486

tomverbeure-ds1486-ds1486-schematic

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tomverbeure-ds1486-ds1486-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
76Placed parts
72Net labels
KiCad 9File format

Bill of materials

76 distinct parts

74 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
BT1CR1225 H2Device:Battery_Cell
C11uDevice:C
C10100nDevice:C
C111uDevice:C
C121uDevice:C
C13100nDevice:C
C14100nDevice:C
C15100nDevice:C
C16100nDevice:C
C17100nDevice:C
C18100nDevice:C
C19100nDevice:C
C21uDevice:C
C20100nDevice:C
C315pDevice:C
C415pDevice:C
C5100nDevice:C
C6100nDevice:C
C7100nDevice:C
C8100nDevice:C
C9100nDevice:C
D1BZT52C6V8-7-FDiode:BZT52Bxx
D2BZT52C6V8-7-FDiode:BZT52Bxx
J1DBGConnector:Conn_01x03_Pin
J2DBG1-16Connector_Generic:Conn_01x16
J3DBG17-32Connector_Generic:Conn_01x16
J4DS1-16Connector_Generic:Conn_01x16
J5DS17-32Connector_Generic:Conn_01x16
R10Device:R
R101kDevice:R
R111kDevice:R
R121kDevice:R
R131kDevice:R
R141kDevice:R
R151kDevice:R
R161kDevice:R
R171kDevice:R
R181kDevice:R
R191kDevice:R
R21kDevice:R
Show the other 36
R201.96kDevice:R
R211.96kDevice:R
R221.96kDevice:R
R231.96kDevice:R
R241.96kDevice:R
R251.96kDevice:R
R261.96kDevice:R
R271.96kDevice:R
R281.96kDevice:R
R291.96kDevice:R
R31.96kDevice:R
R301.96kDevice:R
R311.96kDevice:R
R321.96kDevice:R
R331.96kDevice:R
R341.96kDevice:R
R351.96kDevice:R
R3610kDevice:R
R374k7Device:R
R384k7Device:R
R391kDevice:R
R41kDevice:R
R4010kDevice:R
R51kDevice:R
R61kDevice:R
R71kDevice:R
R81kDevice:R
R91kDevice:R
U1RP2040MCU_RaspberryPi:RP2040
U2AP2112K-3.3Regulator_Linear:AP2112K-3.3
U3W25Q16JVUXIQKicad_Personal:W25Q16JVUXIQ
U4SN74LVC8T245Logic_LevelTranslator:SN74LVC8T245
U5SN74LVC1G00DRL74xGxx:SN74LVC1G00DRL
U6YSN8010SJKicad_Personal:YSN8010SJ
U7SN74LVC1G00DRL74xGxx:SN74LVC1G00DRL
Y2E3SB12E00004EEDevice:Crystal_GND24

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.