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Reference schematic

Sirith Pico

winedarksea-sirith_pico-3-sirith_pico-schematic

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winedarksea-sirith_pico-3-sirith_pico-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
80Placed parts
54Net labels
KiCad 6File format

Bill of materials

76 distinct parts

64 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
C10100 nF 25V X7RDevice:C_Small
C11100 nF 25V X7RDevice:C_Small
C12100 nF 25V X7RDevice:C_Small
C13100 nF 25V X7RDevice:C_Small
C14100 nF 25V X7RDevice:C_Small
C15100 nF 25V X7RDevice:C_Small
C16100 nF 25V X7RDevice:C_Small
C171 uF 50V X5RDevice:C_Small
C181 uF 50V X5RDevice:C_Small
C191 uF 50V X5RDevice:C_Small
C20100 nF 25V X7RDevice:C_Small
C21100 nF 25V X7RDevice:C_Small
C22100 nF 25V X7RDevice:C_Small
C2310 uF 16V X7RDevice:C_Small
C24100 nF 25V X7RDevice:C_Small
C2533 pF 6V C0GDevice:C_Small
C2633 pF 6V C0GDevice:C_Small
CONN1SM04B-SRSS-TB(LF)(SN)RP2040:STEMMA_I2C_QT
CONN2SM04B-SRSS-TB(LF)(SN)Adafruit Feather RP2040-eagle-import:STEMMA_I2C_QT
D2Zener 3V3Device:D_Zener_Small
D3Zener 3V3Device:D_Zener_Small
D4Zener 3V3Device:D_Zener_Small
IC1RP2040_QFN56Adafruit Feather RP2040-eagle-import:RP2040_QFN56
J10headerConnector:Conn_01x01_Female
J11JST XHConnector:Conn_01x04_Female
J12Micro_SD_CardConnector:Micro_SD_Card
J3Conn_01x02_FemaleConnector:Conn_01x02_Female
J4Conn_01x02_FemaleConnector:Conn_01x02_Female
J5Conn_01x02_FemaleConnector:Conn_01x02_Female
J6Conn_01x11_FemaleConnector:Conn_01x11_Female
J7headerConnector:Conn_01x01_Female
J8headerConnector:Conn_01x01_Female
J9headerConnector:Conn_01x01_Female
Q1BSS138Transistor_FET:AO3400A
R10330Device:R_Small
R11330Device:R_Small
R121KDevice:R_Small
R13200KDevice:R_Small
R1427RDevice:R_Small
R1527RDevice:R_Small
Show the other 36
R1610KDevice:R_Small
R17330Device:R_Small
R1827RDevice:R_Small
R1927RDevice:R_Small
R20330Device:R_Small
R214K7Device:R_Small
R2227RDevice:R_Small
R23110KDevice:R_Small
R241MDevice:R_Small
R25330Device:R_Small
R264K7Device:R_Small
R271MDevice:R_Small
R28330Device:R_Small
R29330Device:R_Small
R3027RDevice:R_Small
R31110KDevice:R_Small
R32110KDevice:R_Small
R334K7Device:R_Small
R3410KDevice:R_Small
R354K7Device:R_Small
R3627RDevice:R_Small
R3727RDevice:R_Small
R381KDevice:R_Small
R391MDevice:R_Small
R510KDevice:R_Small
R610KDevice:R_Small
R7330Device:R_Small
R8330Device:R_Small
R9330Device:R_Small
SW1SW_SPSTSwitch:SW_SPST
SW2SW_SPSTSwitch:SW_SPST
SW3SW_SPSTSwitch:SW_SPST
TP2TestPointConnector:TestPoint
U6W25Q16JVSMemory_Flash:W25Q128JVS
U7TPD4EUSB30Power_Protection:TPD4EUSB30
Y212MHz X322512MSB4SIDevice:Crystal_GND24_Small

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.