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Reference schematic

Sirith Pico

winedarksea-sirith_pico-5-sirith_pico-schematic

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winedarksea-sirith_pico-5-sirith_pico-schematic

Take the project archive: a schematic is a root sheet plus every sub-sheet beside it, and the root alone opens with its hierarchy missing. The archive is zstd-compressed (tar.zst).

1Sheets
77Placed parts
35Net labels
KiCad 6File format

Bill of materials

77 distinct parts

69 resolve to something in the catalog — click through to the component.

RefValueSymbolQty
C3510 nF 50V X7RDevice:C_Small
C3647 uF 25V X7RDevice:C_Small
C3747 uF 25V X7RDevice:C_Small
C3847 uF 25V X7RDevice:C_Small
C39100 nF 25V X7RDevice:C_Small
C4010 uF 35V X7RDevice:C_Small
C4110 uF 35V X7RDevice:C_Small
C42220 nF 16V X7RDevice:C_Small
C43220 nF 16V X7RDevice:C_Small
C4410 nF 50V X7RDevice:C_Small
C4510 nF 50V X7RDevice:C_Small
C4610 uF 35V X7RDevice:C_Small
C474.7 uF 16V X5RDevice:C_Small
C484.7 uF 16V X5RDevice:C_Small
C4910 uF 35V X7RDevice:C_Small
C5047 nF 30V X7RDevice:C_Small
C514.7 uF 16V X5RDevice:C_Small
C5233 pF 6V C0GDevice:C_Small
C5310 nF 50V X7RDevice:C_Small
D10LED_GREENDevice:LED
D11PTVS22VS1URPTVS22VS1UR:PTVS22VS1UR
D12LED_GREENDevice:LED
D13PTVS22VS1URPTVS22VS1UR:PTVS22VS1UR
D14DNPDevice:D_Schottky_Small_Filled
D15LED_BLUEDevice:LED
D16LED_BLUEDevice:LED
D17D_SchottkyDevice:D_Schottky
D18PTVS22VS1URPTVS22VS1UR:PTVS22VS1UR
F1Fuse HolderDevice:Fuse
J16THMConnector:Conn_01x02_Female
J17headerConnector:Conn_01x01_Female
J18TerminalConnector:Screw_Terminal_01x02
J19TerminalConnector:Screw_Terminal_01x02
J20XT60-MXT60:XT60-M
JP4AVL_JPJumper:SolderJumper_2_Open
JP5HEADER-3X04AdaPCA9685:HEADER-3X04
JP6Jumper_2_OpenJumper:Jumper_2_Open
L13.3 uH DR127-3R3-RDevice:L_Small
Q4DMP3007SCGTransistor_FET:DMP3013SFV
Q5BSS138Transistor_FET:AO3400A
Show the other 37
Q6DMP3007SCGTransistor_FET:DMP3013SFV
Q7DMP3007SCGTransistor_FET:DMP3013SFV
R44110KDevice:R_Small
R4510KDevice:R_Small
R461KDevice:R_Small
R4710Device:R_Small
R480.01 Ω 3WDevice:R_Small
R4910KDevice:R_Small
R5010KDevice:R_Small
R5110Device:R_Small
R5210KDevice:R_Small
R530.01 Ω 3WDevice:R_Small
R54226KDevice:R_Small
R55226KDevice:R_Small
R5617k8Device:R_Small
R5710KDevice:R_Small
R584K7Device:R_Small
R5910KDevice:R_Small
R60110KDevice:R_Small
R614.7Device:R_Small
R628660Device:R_Small
R631KDevice:R_Small
R641KDevice:R_Small
R65200KDevice:R_Small
R6617k8Device:R_Small
R67200KDevice:R_Small
R681MDevice:R_Small
R691KDevice:R_Small
R7010Device:R_Small
R7110Device:R_Small
R7210KDevice:R_Small
SW4CK PCM12SMTRSwitch:SW_SPDT
TP4TestPointConnector:TestPoint
TP5TestPointConnector:TestPoint
TP6TestPointConnector:TestPoint
TP7TestPointConnector:TestPoint
U10MAX77960x06MAX77961EFV06:MAX77961EFV06+

Provenance

Commit
unknown
Licence
CC-BY-4.0

How it is used

Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.