Reference layout
Olivier Super V Lo BOARD3
zephircharles-olivier-Super-V-lo-board3-Super-V-lo-layout
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zephircharles-olivier-Super-V-lo-board3-Super-V-lo-layout
The project archive carries the board, its project file and the upstream licence. The archive is zstd-compressed (tar.zst).
32Placed parts
63Nets
4Copper layers
29.36 × 62.1 mmBoard size
yesRouted
KiCad 8File format
Bill of materials
32 distinct parts
13 resolve to something in the catalog — click through to the footprint.
| Ref | Value | Footprint | Qty |
|---|---|---|---|
| C1 | 10uF | FootprintLibrary:C_10uF | |
| C10 | 1uF | Capacitor_SMD:C_0805_2012Metric | |
| C11 | 10uF | FootprintLibrary:C_10uF | |
| C2 | 22uF | FootprintLibrary:C_size0805 | |
| C3 | 100nF | FootprintLibrary:C_size0805 | |
| C4 | 0.1uF | Capacitor_SMD:C_0805_2012Metric | |
| C5 | 0.1uF | Capacitor_SMD:C_0805_2012Metric | |
| C6 | 100nF | FootprintLibrary:C_size0805 | |
| C8 | 10uF | FootprintLibrary:C_size0805 | |
| C9 | 0.1uF | Capacitor_SMD:C_0805_2012Metric | |
| D1 | SMA6J58CA-Q | FootprintLibrary:CR_041-1JY_STM | |
| D2 | SMA6J58CA-Q | FootprintLibrary:CR_041-1JY_STM | |
| D3 | ~ | FootprintLibrary:Schottky | |
| D4 | SMA6J58CA-Q | FootprintLibrary:CR_041-1JY_STM | |
| D5 | LED | FootprintLibrary:LED_R | |
| J1 | USB_B_Micro | Connector_USB:USB_Micro-B_Amphenol_10118193-0002LF_Horizontal | |
| J2 | Conn_01x22_Pin | Connector_PinHeader_2.54mm:PinHeader_1x22_P2.54mm_Vertical | |
| J3 | Conn_01x22_Pin | Connector_PinHeader_2.54mm:PinHeader_1x22_P2.54mm_Vertical | |
| Q1 | 2N2219 | FootprintLibrary:BSR14 | |
| Q2 | 2N2219 | FootprintLibrary:BSR14 | |
| R1 | 5.1k(1%) | Resistor_SMD:R_0805_2012Metric | |
| R13 | 5.1k(1%) | Resistor_SMD:R_0805_2012Metric | |
| R14 | 0(1%) | FootprintLibrary:R_0 | |
| R15 | 10K(1%) | FootprintLibrary:R_10k(1%) | |
| R2 | 5.1k(1%) | Resistor_SMD:R_0805_2012Metric | |
| R3 | 10k | FootprintLibrary:R_10k(1%) | |
| R4 | 10k | FootprintLibrary:R_10k(1%) | |
| SW1 | ~ | FootprintLibrary:PTS 647 SN50 SMTR2 LFS | |
| SW2 | ~ | FootprintLibrary:PTS 647 SN50 SMTR2 LFS | |
| U1 | ESP32-S3-WROOM-1 | RF_Module:ESP32-S3-WROOM-1 | |
| U2 | AZ1117-3.3 | Package_TO_SOT_SMD:SOT-223-3_TabPin2 | |
| U3 | CH340C | Package_SO:SOIC-16_3.9x9.9mm_P1.27mm |
Provenance
- Repository
- zephircharles-olivier/Super-V-lo ↗
- Commit
- unknown
- Licence
- CC-BY-4.0
How it is used
Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.