SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.95x4.9mm_Mask2.34x2.34mm_ThermalVias

Package_SO

SOIC, 8 Pin (JEDEC MS-012 variation BA (thermally enhanced), using tolerances and Exposed Pad from Texas Instruments DDA0008A, https://www.ti.com/lit/ml/pptd272a/pptd272a.pdf, https://www.ti.com/lit/ds/symlink/tps92511.pdf#page=29, https://www.jedec.org/document_search?search_api_views_fulltext=MS-012)

Footprint

9 pads
Footprint SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.95x4.9mm_Mask2.34x2.34mm_ThermalVias
Mount
Surface mount
Courtyard
7.4 × 5.4 mm
Pads
9
File
7 KB

3D model

none
no 3D model

This footprint names no 3D model, or names one the upstream package set never shipped. Nothing is shown rather than a model that 404s.

Parts that use it

1 component in the catalog place this footprint

Provenance

Credit
KiCad Libraries Contributors
Licence
CC-BY-SA-4.0-with-KiCad-exception