74LVCH2T45DC

Logic_LevelTranslator

Dual supply translating transceiver with bus-hold for unused/floating inputs, 3-state, 2-bit, VSSOP-8

Symbol

8 pins
Schematic symbol for 74LVCH2T45DC
Units
1
Kind
part
Grid
on 1.27 mm
Extends
74LVC2T45DC

Footprint

8 pads
Footprint for 74LVCH2T45DC
Library
Package_SO
Mount
smd
Courtyard
4.56 × 2.5 mm
Link
exact

3D model

STEP

Package_SO_VSSOP-8_2.3x2mm_P0.5mm

3.10 × 2 × 0.85 mm

122 KB STEP

Library
Package_SO_VSSOP-8_2.3x2mm
Link
exact

Pins and pads

Every pin on the symbol has a pad on the footprint.

PinNameTypePad
1VCCApower_in1
21Abidirectional2
32Abidirectional3
4GNDpower_in4
5DIRinput5
62Bbidirectional6
71Bbidirectional7
8VCCBpower_in8

Provenance

Credit
KiCad Libraries Contributors
Licence
CC-BY-SA-4.0-with-KiCad-exception
Link method
exact
Cross-check
passed
74LVCH2T45DC — Logic_LevelTranslator | Trace Catalog