STM32MP131CAFx

MCU_ST_STM32MP1

STMicroelectronics Arm Cortex-A7 MCU, 0KB flash, 168KB RAM, 136 GPIO, TFBGA320

Symbol

320 pins
Schematic symbol for STM32MP131CAFx
Units
1
Kind
part
Grid
on 1.27 mm

Footprint

320 pads
Footprint for STM32MP131CAFx
Library
Package_BGA
Mount
smd
Courtyard
13 × 13 mm
Link
exact

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

Every pin on the symbol has a pad on the footprint.

PinNameTypePad
A1VSSpower_inA1
A2PA9bidirectionalA2
A3PE13bidirectionalA3
A4PE12bidirectionalA4
A6PD12bidirectionalA6
A7PG0bidirectionalA7
A9PE15bidirectionalA9
B1PD0bidirectionalB1
B2PE11bidirectionalB2
B3PF5bidirectionalB3
B4PA15bidirectionalB4
B5PD8bidirectionalB5
B6PE0bidirectionalB6
B7PE9bidirectionalB7
B8PH14bidirectionalB8
B9PE8bidirectionalB9
C1PB6bidirectionalC1
C2PD3bidirectionalC2
C3PE14bidirectionalC3
C4PD14bidirectionalC4
C5PD1bidirectionalC5
C6PB7bidirectionalC6
C7PD4bidirectionalC7
C8PD5bidirectionalC8
C9PD9bidirectionalC9
D1PB8bidirectionalD1
D2PD6bidirectionalD2
D3PH12bidirectionalD3
D6PD10bidirectionalD6
D8PE7bidirectionalD8
E2PH2bidirectionalE2
E3PH8bidirectionalE3
E5VSSpassiveE5
E6VSSpassiveE6
E7VDDCPUpower_inE7
E8PE1bidirectionalE8
E9PD15bidirectionalE9
F1PF8bidirectionalF1
F2PG9bidirectionalF2
F3PD11bidirectionalF3
F4PA12bidirectionalF4
F5VSSpassiveF5
G1PF6bidirectionalG1
G2PG10bidirectionalG2
G3PG5bidirectionalG3
G5VDDCPUpower_inG5
G7VDDCPUpower_inG7
G8VSSpassiveG8
G9VDDpower_inG9
H2PE4bidirectionalH2
H3PF10bidirectionalH3
H4PG15bidirectionalH4
H5PG8bidirectionalH5
H7VSSpassiveH7
J1PH7bidirectionalJ1
J2PD13bidirectionalJ2
J3PB2bidirectionalJ3
J5PF9bidirectionalJ5
J7VDDpower_inJ7
J9VDDpower_inJ9
K1VSS_PLLpower_inK1
K2VDD_PLLpower_inK2
K3PH11bidirectionalK3
K5VDDCPUpower_inK5
K7VDDCPUpower_inK7
K9VSSpassiveK9
L2VBATpower_inL2
L3PC15bidirectionalL3
L4PI3bidirectionalL4
L5VSSpassiveL5
L7VDDCOREpower_inL7
L9VDDCOREpower_inL9
M1VSSpassiveM1
M2PC14bidirectionalM2
M3PC13bidirectionalM3
M5VDDpower_inM5
M7VSSpassiveM7
M9VSSpassiveM9
N1PE2bidirectionalN1
N2PF4bidirectionalN2
N3PH6bidirectionalN3
N5PI2bidirectionalN5
N7VDDpower_inN7
N9VDDpower_inN9
P2PA8bidirectionalP2
P3PF7bidirectionalP3
P4PI1bidirectionalP4
P5PI0bidirectionalP5
P7VSSpassiveP7
R1PG1bidirectionalR1
R2PG11bidirectionalR2
R3PH3bidirectionalR3
R5VDDpower_inR5
R7VDDpower_inR7
R8VSSpassiveR8
R9VDDpower_inR9
T1VSSpassiveT1
T2PE6bidirectionalT2
T3PH0bidirectionalT3
T4PA13bidirectionalT4
T5VSSpassiveT5
U2PH1bidirectionalU2
U3VSS_ANApower_inU3
U5VSSpassiveU5
U6VSSpassiveU6
U7VDDpower_inU7
U8VDDApower_inU8
U9VSSApower_inU9
V1PD7bidirectionalV1
V2VDD_ANApower_inV2
V3PG2bidirectionalV3
V6PA7bidirectionalV6
V8VREF-inputV8
W1PG3bidirectionalW1
W2PG12bidirectionalW2
W3PWR_CPU_ONoutputW3
W4PF13bidirectionalW4
W5PC0bidirectionalW5
W6PC3bidirectionalW6
W7VREF+inputW7
W8PB0bidirectionalW8
W9PA3bidirectionalW9
Y1PA11bidirectionalY1
Y2PF14bidirectionalY2
Y3PA0bidirectionalY3
Y4PA2bidirectionalY4
Y5PA5bidirectionalY5
Y6PF11bidirectionalY6
Y7PC4bidirectionalY7
Y8PB1bidirectionalY8
Y9PC1bidirectionalY9
A10PG7bidirectionalA10
A12PH13bidirectionalA12
A13PF3bidirectionalA13
A15PB9bidirectionalA15
A16PF0bidirectionalA16
A18PC10bidirectionalA18
A19PC12bidirectionalA19
A20PC9bidirectionalA20
A21VSSpassiveA21
AA1VSSpassiveAA1
AA2PB11bidirectionalAA2
AA3PA1bidirectionalAA3
AA4PF12bidirectionalAA4
AA6PA4bidirectionalAA6
AA7PC5bidirectionalAA7
AA9PG13bidirectionalAA9
B10PG4bidirectionalB10
B11PF1bidirectionalB11
B12VSSpassiveB12
B13PB5bidirectionalB13
B14PC6bidirectionalB14
B15PB15bidirectionalB15
B16PB14bidirectionalB16
B17PE3bidirectionalB17
B18PC11bidirectionalB18
B19DDR_DQ4bidirectionalB19
B20DDR_DQ1bidirectionalB20
B21DDR_DQ0bidirectionalB21
C10PE10bidirectionalC10
C11PB12bidirectionalC11
C12PH9bidirectionalC12
C13PC7bidirectionalC13
C14PB3bidirectionalC14
C15VDDSD2power_inC15
C16PB4bidirectionalC16
C17PG6bidirectionalC17
C18PC8bidirectionalC18
C19PD2bidirectionalC19
C20DDR_DQS0PbidirectionalC20
C21DDR_DQS0NbidirectionalC21
D11PF2bidirectionalD11
D14PB13bidirectionalD14
D16VSSpassiveD16
D19DDR_DQ2bidirectionalD19
D20DDR_DQ5bidirectionalD20
D21DDR_DQM0bidirectionalD21
E10VDDCPUpower_inE10
E11VSSpassiveE11
E12VDDpower_inE12
E13PB10bidirectionalE13
E14PH10bidirectionalE14
E15VDDQ_DDRpower_inE15
E16VSSpassiveE16
E17VDDSD1power_inE17
E19DDR_DQ3bidirectionalE19
E20DDR_DQ6bidirectionalE20
F17VSSpassiveF17
F18VSSpassiveF18
F19DDR_DQ7bidirectionalF19
F20DDR_A5bidirectionalF20
F21VSSpassiveF21
G10VDDCPUpower_inG10
G11VDDCOREpower_inG11
G12VSSpassiveG12
G13VDDpower_inG13
G14VSSpassiveG14
G15VDDQ_DDRpower_inG15
G17VDDQ_DDRpower_inG17
G19DDR_A13bidirectionalG19
G20DDR_A2bidirectionalG20
G21DDR_A9bidirectionalG21
H15VSSpassiveH15
H17DDR_RESETNbidirectionalH17
H18DDR_BA2bidirectionalH18
H19DDR_A3bidirectionalH19
H20DDR_A0bidirectionalH20
J10VSSpassiveJ10
J11VDDCOREpower_inJ11
J12VSSpassiveJ12
J13VDDpower_inJ13
J15VDDCOREpower_inJ15
J17DDR_A7bidirectionalJ17
J19DDR_BA0bidirectionalJ19
J20DDR_CSNbidirectionalJ20
J21DDR_ODTbidirectionalJ21
K10VSSpassiveK10
K11VSSpassiveK11
K12VSSpassiveK12
K13VSSpassiveK13
K15VDDQ_DDRpower_inK15
K17VDDQ_DDRpower_inK17
K19DDR_WENbidirectionalK19
K20DDR_RASNbidirectionalK20
K21VSSpassiveK21
L10VSSpassiveL10
L12VSSpassiveL12
L13VDDCOREpower_inL13
L15VSSpassiveL15
L17VSSpassiveL17
L18DDR_A10bidirectionalL18
L19DDR_CASNbidirectionalL19
L20DDR_CLKNbidirectionalL20
M10VSSpassiveM10
M11VSSpassiveM11
M12VSSpassiveM12
M13VSSpassiveM13
M15VDDQ_DDRpower_inM15
M17VDDQ_DDRpower_inM17
M19DDR_A12bidirectionalM19
M20DDR_CLKPbidirectionalM20
M21DDR_A15bidirectionalM21
N10VDDCOREpower_inN10
N11VSSpassiveN11
N12VDDpower_inN12
N13VDDCOREpower_inN13
N15VDDCOREpower_inN15
N17DDR_A11bidirectionalN17
N19DDR_A14bidirectionalN19
N20DDR_CKEbidirectionalN20
N21DDR_A1bidirectionalN21
P15VSSpassiveP15
P17DDR_DTO1bidirectionalP17
P18DDR_ATObidirectionalP18
P19DDR_A8bidirectionalP19
P20DDR_BA1bidirectionalP20
R10VDDCOREpower_inR10
R11VSSpassiveR11
R12VDDpower_inR12
R13VDDCOREpower_inR13
R14VSSpassiveR14
R15VDDQ_DDRpower_inR15
R17VDDQ_DDRpower_inR17
R19DDR_A4bidirectionalR19
R20DDR_ZQbidirectionalR20
R21DDR_A6bidirectionalR21
T17VSSpassiveT17
T18DDR_VREFbidirectionalT18
T19DDR_DQ10bidirectionalT19
T20DDR_DQ8bidirectionalT20
T21VSSpassiveT21
U10PA6bidirectionalU10
U11VSSpassiveU11
U12VDDCOREpower_inU12
U13VSSpassiveU13
U14VDDCOREpower_inU14
U15VDDQ_DDRpower_inU15
U16VSSpassiveU16
U17PWR_ONoutputU17
U19DDR_DQ13bidirectionalU19
U20DDR_DQ9bidirectionalU20
V11NJTRSTbidirectionalV11
V14VDDA1V1_REGpower_inV14
V16VSSpassiveV16
V19PWR_LPoutputV19
V20DDR_DQS1PbidirectionalV20
V21DDR_DQS1NbidirectionalV21
W10PE5bidirectionalW10
W11VDDpower_inW11
W12USB_RREFbidirectionalW12
W13PA14bidirectionalW13
W14VDD3V3_USBHSpower_inW14
W15VDDA1V8_REGpower_inW15
W16VSSpassiveW16
W17BYPASS_REG1V8bidirectionalW17
W18PH5bidirectionalW18
W19DDR_DQ12bidirectionalW19
W20DDR_DQ11bidirectionalW20
W21DDR_DQM1bidirectionalW21
Y10PG14bidirectionalY10
Y11NRSTinputY11
Y12PF15bidirectionalY12
Y13USB_DM2bidirectionalY13
Y14VSS_USBHSpower_inY14
Y15PI6bidirectionalY15
Y16USB_DP1bidirectionalY16
Y17PI4bidirectionalY17
Y18VDD_PLL2power_inY18
Y19PH4bidirectionalY19
Y20DDR_DQ15bidirectionalY20
Y21DDR_DQ14bidirectionalY21
AA10PC2bidirectionalAA10
AA12PDR_ONbidirectionalAA12
AA13USB_DP2bidirectionalAA13
AA15PI5bidirectionalAA15
AA16USB_DM1bidirectionalAA16
AA18VSS_PLL2power_inAA18
AA19PA10bidirectionalAA19
AA20PI7bidirectionalAA20
AA21VSSpassiveAA21

Provenance

Credit
KiCad Libraries Contributors
Licence
CC-BY-SA-4.0-with-KiCad-exception
Link method
exact
Cross-check
passed
STM32MP131CAFx — MCU_ST_STM32MP1 | Trace Catalog