NXP K32L2A31VLH1A
celestial-altium-ARM_Cortex
Symbol
64 pins- Units
- 3
- Kind
- part
- Grid
- on 1.27 mm
Footprint
noneno footprint linked
This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.
3D model
noneno 3D model
The footprint references no model, or the referenced model is not in the upstream package set.
Pins and pads
No footprint is linked, so there is nothing to cross-check.
| Pin | Name | Type |
|---|---|---|
| 1 | ADC0_SE16/PTE0/RTC_CLKOUT/LPSPI1_SIN/LPUART1_TX/CMP0_OUT/LPI2C1_SDA | passive |
| 2 | ADC0_SE17/PTE1/LLWU_P0/LPSPI1_SOUT/LPUART1_RX/LPI2C1_SCL | passive |
| 3 | VDD8 | passive |
| 4 | VSS9 | passive |
| 5 | USB0_DP | passive |
| 6 | USB0_DM | passive |
| 7 | VOUT33 | passive |
| 8 | VREGIN | passive |
| 9 | ADC0_DP0/ADC0_SE0/PTE20/LPSPI2_SCK/TPM1_CH0/LPUART0_TX/FXIO0_D4 | passive |
| 10 | ADC0_DM0/ADC0_SE4a/PTE21/LPSPI2_SOUT/TPM1_CH1/LPUART0_RX/FXIO0_D5 | passive |
| 11 | ADC0_DP3/ADC0_SE3/PTE22/LPSPI2_SIN/TPM2_CH0/LPUART2_TX/FXIO0_D6 | passive |
| 12 | ADC0_DM3/ADC0_SE7a/PTE23/LPSPI2_PCS0/TPM2_CH1/LPUART2_RX/FXIO0_D7 | passive |
| 13 | VDDA | passive |
| 14 | VREFH/VREF_OUT | passive |
| 15 | VREFL | passive |
| 16 | VSSA | passive |
| 17 | CMP1_IN5/CMP0_IN5/ADC0_SE4b/PTE29/EMVSIM0_CLK/TPM0_CH2/TPM0_CLKIN | passive |
| 18 | DAC0_OUT/CMP1_IN3/ADC0_SE23/CMP0_IN4/PTE30/EMVSIM0_RST/TPM0_CH3/TPM1_CLKIN | passive |
| 19 | PTE31/EMVSIM0_VCCEN/TPM0_CH4/TPM2_CLKIN/LPI2C0_HREQ | passive |
| 20 | ADC0_SE20/PTE24/EMVSIM0_IO/TPM0_CH0/LPI2C0_SCL | passive |
| 21 | ADC0_SE21/PTE25/LLWU_P21/EMVSIM0_PD/TPM0_CH1/LPI2C0_SDA | passive |
| 22 | ~{TSI0_CH1}/PTA0/~{LPUART0_CTS_b}/TPM0_CH5/LPI2C0_SDAS/SWD_CLK | passive |
| 23 | TSI0_CH2/PTA1/LPUART0_RX/TPM2_CH0 | passive |
| 24 | TSI0_CH3/PTA2/LPUART0_TX/TPM2_CH1 | passive |
| 25 | ~{TSI0_CH4}/PTA3/LPI2C1_SCL/TPM0_CH0/~{LPUART0_RTS_b}/SWD_DIO | passive |
| 26 | ~{TSI0_CH5}/PTA4/LLWU_P3/LPI2C1_SDA/TPM0_CH1/~{NMI0_b} | passive |
| 27 | PTA5/USB_CLKIN/TPM0_CH2/LPI2C2_HREQ | passive |
| 28 | PTA12/TPM1_CH0/LPI2C2_SCL | passive |
| 29 | PTA13/LLWU_P4/TPM1_CH1/LPI2C2_SDA | passive |
| 30 | VDD48 | passive |
| 31 | VSS49 | passive |
| 32 | EXTAL0/PTA18/LPUART1_RX/TPM0_CLKIN | passive |
| 33 | XTAL0/PTA19/LPUART1_TX/TPM1_CLKIN/LPTMR0_ALT1/LPTMR1_ALT1 | passive |
| 34 | ~{PTA20}/LPI2C0_SCLS/TPM2_CLKIN/~{RESET_b} | passive |
| 35 | ADC0_SE8/TSI0_CH0/PTB0/LLWU_P5/LPI2C0_SCL/TPM1_CH0/FXIO0_D8 | passive |
| 36 | ADC0_SE9/TSI0_CH6/PTB1/LPI2C0_SDA/TPM1_CH1/FXIO0_D9 | passive |
| 37 | ~{ADC0_SE12}/TSI0_CH7/PTB2/LPI2C0_SCL/TPM2_CH0/~{LPUART0_RTS_b}/FXIO0_D10 | passive |
| 38 | ~{ADC0_SE13}/TSI0_CH8/PTB3/LPI2C0_SDA/TPM2_CH1/LPSPI1_PCS3/~{LPUART0_CTS_b}/FXIO0_D11 | passive |
| 39 | TSI0_CH9/PTB16/LPSPI1_SOUT/LPUART0_RX/TPM0_CLKIN/LPSPI2_PCS3/FXIO0_D16 | passive |
| 40 | TSI0_CH10/PTB17/LPSPI1_SIN/LPUART0_TX/TPM1_CLKIN/LPSPI2_PCS2/FXIO0_D17 | passive |
| 41 | TSI0_CH11/PTB18/TPM2_CH0/LPI2C1_HREQ/FXIO0_D18 | passive |
| 42 | TSI0_CH12/PTB19/TPM2_CH1/LPSPI2_PCS1/FXIO0_D19 | passive |
| 43 | ADC0_SE14/TSI0_CH13/PTC0/LPSPI2_PCS1/USB_SOF_OUT/CMP0_OUT | passive |
| 44 | ~{ADC0_SE15}/TSI0_CH14/PTC1/LLWU_P6/LPI2C1_SCL/~{LPUART1_RTS_b}/TPM0_CH0 | passive |
| 45 | ~{ADC0_SE11}/CMP1_IN0/TSI0_CH15/PTC2/LPI2C1_SDA/~{LPUART1_CTS_b}/TPM0_CH1 | passive |
| 46 | CMP1_IN1/PTC3/LLWU_P7/LPSPI0_PCS1/LPUART1_RX/TPM0_CH2/CLKOUT | passive |
| 47 | VSS74 | passive |
| 48 | VDD75 | passive |
| 49 | PTC4/LLWU_P8/LPSPI0_PCS0/LPUART1_TX/TPM0_CH3/CMP1_OUT | passive |
| 50 | PTC5/LLWU_P9/LPSPI0_SCK/LPTMR0_ALT2/LPTMR1_ALT2/CMP0_OUT | passive |
| 51 | CMP0_IN0/PTC6/LLWU_P10/LPSPI0_SOUT | passive |
| 52 | CMP0_IN1/PTC7/LPSPI0_SIN/USB_SOF_OUT/FXIO0_D20 | passive |
| 53 | CMP0_IN2/PTC8/LPI2C0_SCL/TPM0_CH4/FXIO0_D21 | passive |
| 54 | CMP0_IN3/PTC9/LPI2C0_SDA/TPM0_CH5/FXIO0_D22 | passive |
| 55 | PTC10/LPI2C1_SCL/FXIO0_D23 | passive |
| 56 | PTC11/LLWU_P11/LPI2C1_SDA | passive |
| 57 | ~{PTD0}/LLWU_P12/LPSPI0_PCS0/~{LPUART2_RTS_b}/TPM0_CH0/FXIO0_D0 | passive |
| 58 | ~{ADC0_SE5b}/PTD1/LPSPI0_SCK/~{LPUART2_CTS_b}/TPM0_CH1/FXIO0_D1 | passive |
| 59 | PTD2/LLWU_P13/LPSPI0_SOUT/LPUART2_RX/TPM0_CH2/FXIO0_D2 | passive |
| 60 | PTD3/LPSPI0_SIN/LPUART2_TX/TPM0_CH3/FXIO0_D3 | passive |
| 61 | ~{PTD4}/LLWU_P14/LPSPI1_PCS0/LPUART2_RX/TPM0_CH4/~{LPUART0_RTS_b}/FXIO0_D4 | passive |
| 62 | ~{ADC0_SE6b}/PTD5/LPSPI1_SCK/LPUART2_TX/TPM0_CH5/~{LPUART0_CTS_b}/FXIO0_D5 | passive |
| 63 | ADC0_SE7b/PTD6/LLWU_P15/LPSPI1_SOUT/LPUART0_RX/FXIO0_D6 | passive |
| 64 | PTD7/LPSPI1_SIN/LPUART0_TX/FXIO0_D7 | passive |
Provenance
- Source
- celestial-altium-symbols
- Credit
- Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
- Licence
- LicenseRef-Celestial-Altium
- Link method
- none
- Cross-check
- not confirmed
